2013-05-26 18:30:56 +00:00
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#ifndef _ASM_POWERPC_TM_H
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#define _ASM_POWERPC_TM_H
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/* Reason codes describing kernel causes for transaction aborts. By
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* convention, bit0 is copied to TEXASR[56] (IBM bit 7) which is set if
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* the failure is persistent. PAPR saves 0xff-0xe0 for the hypervisor.
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*/
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#define TM_CAUSE_PERSISTENT 0x01
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2014-01-08 21:25:33 +11:00
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#define TM_CAUSE_KVM_RESCHED 0xe0 /* From PAPR */
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#define TM_CAUSE_KVM_FAC_UNAV 0xe2 /* From PAPR */
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2013-05-26 18:30:56 +00:00
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#define TM_CAUSE_RESCHED 0xde
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#define TM_CAUSE_TLBI 0xdc
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#define TM_CAUSE_FAC_UNAV 0xda
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2015-06-12 11:06:32 +10:00
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#define TM_CAUSE_SYSCALL 0xd8
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2013-05-26 18:30:56 +00:00
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#define TM_CAUSE_MISC 0xd6 /* future use */
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#define TM_CAUSE_SIGNAL 0xd4
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#define TM_CAUSE_ALIGNMENT 0xd2
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#define TM_CAUSE_EMULATE 0xd0
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#endif
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