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										 |  |  | /*
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							|  |  |  |  * Just-In-Time compiler for BPF filters on MIPS | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * Copyright (c) 2014 Imagination Technologies Ltd. | 
					
						
							|  |  |  |  * Author: Markos Chandras <markos.chandras@imgtec.com> | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * This program is free software; you can redistribute it and/or modify it | 
					
						
							|  |  |  |  * under the terms of the GNU General Public License as published by the | 
					
						
							|  |  |  |  * Free Software Foundation; version 2 of the License. | 
					
						
							|  |  |  |  */ | 
					
						
							|  |  |  | 
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							|  |  |  | #ifndef BPF_JIT_MIPS_OP_H
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							|  |  |  | #define BPF_JIT_MIPS_OP_H
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							|  |  |  | /* Registers used by JIT */ | 
					
						
							|  |  |  | #define MIPS_R_ZERO	0
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							|  |  |  | #define MIPS_R_V0	2
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							|  |  |  | #define MIPS_R_A0	4
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							|  |  |  | #define MIPS_R_A1	5
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										 |  |  | #define MIPS_R_T4	12
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							|  |  |  | #define MIPS_R_T5	13
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										 |  |  | #define MIPS_R_T6	14
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							|  |  |  | #define MIPS_R_T7	15
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							|  |  |  | #define MIPS_R_S0	16
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							|  |  |  | #define MIPS_R_S1	17
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							|  |  |  | #define MIPS_R_S2	18
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							|  |  |  | #define MIPS_R_S3	19
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							|  |  |  | #define MIPS_R_S4	20
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							|  |  |  | #define MIPS_R_S5	21
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							|  |  |  | #define MIPS_R_S6	22
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							|  |  |  | #define MIPS_R_S7	23
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							|  |  |  | #define MIPS_R_SP	29
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							|  |  |  | #define MIPS_R_RA	31
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							|  |  |  | /* Conditional codes */ | 
					
						
							|  |  |  | #define MIPS_COND_EQ	0x1
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							|  |  |  | #define MIPS_COND_GE	(0x1 << 1)
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							|  |  |  | #define MIPS_COND_GT	(0x1 << 2)
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							|  |  |  | #define MIPS_COND_NE	(0x1 << 3)
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							|  |  |  | #define MIPS_COND_ALL	(0x1 << 4)
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							|  |  |  | /* Conditionals on X register or K immediate */ | 
					
						
							|  |  |  | #define MIPS_COND_X	(0x1 << 5)
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							|  |  |  | #define MIPS_COND_K	(0x1 << 6)
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										 |  |  | #define r_ret	MIPS_R_V0
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							|  |  |  | /*
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							|  |  |  |  * Use 2 scratch registers to avoid pipeline interlocks. | 
					
						
							|  |  |  |  * There is no overhead during epilogue and prologue since | 
					
						
							|  |  |  |  * any of the $s0-$s6 registers will only be preserved if | 
					
						
							|  |  |  |  * they are going to actually be used. | 
					
						
							|  |  |  |  */ | 
					
						
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										 |  |  | #define r_skb_hl	MIPS_R_S0 /* skb header length */
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							|  |  |  | #define r_skb_data	MIPS_R_S1 /* skb actual data */
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										 |  |  | #define r_off		MIPS_R_S2
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							|  |  |  | #define r_A		MIPS_R_S3
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							|  |  |  | #define r_X		MIPS_R_S4
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							|  |  |  | #define r_skb		MIPS_R_S5
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							|  |  |  | #define r_M		MIPS_R_S6
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										 |  |  | #define r_skb_len	MIPS_R_S7
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										 |  |  | #define r_s0		MIPS_R_T4 /* scratch reg 1 */
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							|  |  |  | #define r_s1		MIPS_R_T5 /* scratch reg 2 */
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							|  |  |  | #define r_tmp_imm	MIPS_R_T6 /* No need to preserve this */
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							|  |  |  | #define r_tmp		MIPS_R_T7 /* No need to preserve this */
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							|  |  |  | #define r_zero		MIPS_R_ZERO
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							|  |  |  | #define r_sp		MIPS_R_SP
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							|  |  |  | #define r_ra		MIPS_R_RA
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										 |  |  | #ifndef __ASSEMBLY__
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							|  |  |  | /* Declare ASM helpers */ | 
					
						
							|  |  |  | 
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							|  |  |  | #define DECLARE_LOAD_FUNC(func) \
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							|  |  |  | 	extern u8 func(unsigned long *skb, int offset); \ | 
					
						
							|  |  |  | 	extern u8 func##_negative(unsigned long *skb, int offset); \ | 
					
						
							|  |  |  | 	extern u8 func##_positive(unsigned long *skb, int offset) | 
					
						
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							|  |  |  | DECLARE_LOAD_FUNC(sk_load_word); | 
					
						
							|  |  |  | DECLARE_LOAD_FUNC(sk_load_half); | 
					
						
							|  |  |  | DECLARE_LOAD_FUNC(sk_load_byte); | 
					
						
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							|  |  |  | #endif
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										 |  |  | #endif /* BPF_JIT_MIPS_OP_H */
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