103 lines
		
	
	
	
		
			2.5 KiB
			
		
	
	
	
		
			Text
		
	
	
	
	
	
		
		
			
		
	
	
			103 lines
		
	
	
	
		
			2.5 KiB
			
		
	
	
	
		
			Text
		
	
	
	
	
	
|   | * LPDDR2 SDRAM memories compliant to JEDEC JESD209-2 | ||
|  | 
 | ||
|  | Required properties: | ||
|  | - compatible : Should be one of - "jedec,lpddr2-nvm", "jedec,lpddr2-s2", | ||
|  |   "jedec,lpddr2-s4" | ||
|  | 
 | ||
|  |   "ti,jedec-lpddr2-s2" should be listed if the memory part is LPDDR2-S2 type | ||
|  | 
 | ||
|  |   "ti,jedec-lpddr2-s4" should be listed if the memory part is LPDDR2-S4 type | ||
|  | 
 | ||
|  |   "ti,jedec-lpddr2-nvm" should be listed if the memory part is LPDDR2-NVM type | ||
|  | 
 | ||
|  | - density  : <u32> representing density in Mb (Mega bits) | ||
|  | 
 | ||
|  | - io-width : <u32> representing bus width. Possible values are 8, 16, and 32 | ||
|  | 
 | ||
|  | Optional properties: | ||
|  | 
 | ||
|  | The following optional properties represent the minimum value of some AC | ||
|  | timing parameters of the DDR device in terms of number of clock cycles. | ||
|  | These values shall be obtained from the device data-sheet. | ||
|  | - tRRD-min-tck | ||
|  | - tWTR-min-tck | ||
|  | - tXP-min-tck | ||
|  | - tRTP-min-tck | ||
|  | - tCKE-min-tck | ||
|  | - tRPab-min-tck | ||
|  | - tRCD-min-tck | ||
|  | - tWR-min-tck | ||
|  | - tRASmin-min-tck | ||
|  | - tCKESR-min-tck | ||
|  | - tFAW-min-tck | ||
|  | 
 | ||
|  | Child nodes: | ||
|  | - The lpddr2 node may have one or more child nodes of type "lpddr2-timings". | ||
|  |   "lpddr2-timings" provides AC timing parameters of the device for | ||
|  |   a given speed-bin. The user may provide the timings for as many | ||
|  |   speed-bins as is required. Please see Documentation/devicetree/ | ||
|  |   bindings/lpddr2/lpddr2-timings.txt for more information on "lpddr2-timings" | ||
|  | 
 | ||
|  | Example: | ||
|  | 
 | ||
|  | elpida_ECB240ABACN : lpddr2 { | ||
|  | 	compatible	= "Elpida,ECB240ABACN","jedec,lpddr2-s4"; | ||
|  | 	density		= <2048>; | ||
|  | 	io-width	= <32>; | ||
|  | 
 | ||
|  | 	tRPab-min-tck	= <3>; | ||
|  | 	tRCD-min-tck	= <3>; | ||
|  | 	tWR-min-tck	= <3>; | ||
|  | 	tRASmin-min-tck	= <3>; | ||
|  | 	tRRD-min-tck	= <2>; | ||
|  | 	tWTR-min-tck	= <2>; | ||
|  | 	tXP-min-tck	= <2>; | ||
|  | 	tRTP-min-tck	= <2>; | ||
|  | 	tCKE-min-tck	= <3>; | ||
|  | 	tCKESR-min-tck	= <3>; | ||
|  | 	tFAW-min-tck	= <8>; | ||
|  | 
 | ||
|  | 	timings_elpida_ECB240ABACN_400mhz: lpddr2-timings@0 { | ||
|  | 		compatible	= "jedec,lpddr2-timings"; | ||
|  | 		min-freq	= <10000000>; | ||
|  | 		max-freq	= <400000000>; | ||
|  | 		tRPab		= <21000>; | ||
|  | 		tRCD		= <18000>; | ||
|  | 		tWR		= <15000>; | ||
|  | 		tRAS-min	= <42000>; | ||
|  | 		tRRD		= <10000>; | ||
|  | 		tWTR		= <7500>; | ||
|  | 		tXP		= <7500>; | ||
|  | 		tRTP		= <7500>; | ||
|  | 		tCKESR		= <15000>; | ||
|  | 		tDQSCK-max	= <5500>; | ||
|  | 		tFAW		= <50000>; | ||
|  | 		tZQCS		= <90000>; | ||
|  | 		tZQCL		= <360000>; | ||
|  | 		tZQinit		= <1000000>; | ||
|  | 		tRAS-max-ns	= <70000>; | ||
|  | 	}; | ||
|  | 
 | ||
|  | 	timings_elpida_ECB240ABACN_200mhz: lpddr2-timings@1 { | ||
|  | 		compatible	= "jedec,lpddr2-timings"; | ||
|  | 		min-freq	= <10000000>; | ||
|  | 		max-freq	= <200000000>; | ||
|  | 		tRPab		= <21000>; | ||
|  | 		tRCD		= <18000>; | ||
|  | 		tWR		= <15000>; | ||
|  | 		tRAS-min	= <42000>; | ||
|  | 		tRRD		= <10000>; | ||
|  | 		tWTR		= <10000>; | ||
|  | 		tXP		= <7500>; | ||
|  | 		tRTP		= <7500>; | ||
|  | 		tCKESR		= <15000>; | ||
|  | 		tDQSCK-max	= <5500>; | ||
|  | 		tFAW		= <50000>; | ||
|  | 		tZQCS		= <90000>; | ||
|  | 		tZQCL		= <360000>; | ||
|  | 		tZQinit		= <1000000>; | ||
|  | 		tRAS-max-ns	= <70000>; | ||
|  | 	}; | ||
|  | 
 | ||
|  | } |