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											2013-08-02 16:50:38 +02:00
										 |  |  | /*
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							|  |  |  |  * Renesas SuperH DMA Engine support | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * Copyright (C) 2013 Renesas Electronics, Inc. | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * This is free software; you can redistribute it and/or modify it under the | 
					
						
							|  |  |  |  * terms of version 2 the GNU General Public License as published by the Free | 
					
						
							|  |  |  |  * Software Foundation. | 
					
						
							|  |  |  |  */ | 
					
						
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							|  |  |  | #ifndef SHDMA_ARM_H
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							|  |  |  | #define SHDMA_ARM_H
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							|  |  |  | #include "shdma.h"
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							|  |  |  | /* Transmit sizes and respective CHCR register values */ | 
					
						
							|  |  |  | enum { | 
					
						
							|  |  |  | 	XMIT_SZ_8BIT		= 0, | 
					
						
							|  |  |  | 	XMIT_SZ_16BIT		= 1, | 
					
						
							|  |  |  | 	XMIT_SZ_32BIT		= 2, | 
					
						
							|  |  |  | 	XMIT_SZ_64BIT		= 7, | 
					
						
							|  |  |  | 	XMIT_SZ_128BIT		= 3, | 
					
						
							|  |  |  | 	XMIT_SZ_256BIT		= 4, | 
					
						
							|  |  |  | 	XMIT_SZ_512BIT		= 5, | 
					
						
							|  |  |  | }; | 
					
						
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							|  |  |  | /* log2(size / 8) - used to calculate number of transfers */ | 
					
						
							|  |  |  | #define SH_DMAE_TS_SHIFT {		\
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							|  |  |  | 	[XMIT_SZ_8BIT]		= 0,	\ | 
					
						
							|  |  |  | 	[XMIT_SZ_16BIT]		= 1,	\ | 
					
						
							|  |  |  | 	[XMIT_SZ_32BIT]		= 2,	\ | 
					
						
							|  |  |  | 	[XMIT_SZ_64BIT]		= 3,	\ | 
					
						
							|  |  |  | 	[XMIT_SZ_128BIT]	= 4,	\ | 
					
						
							|  |  |  | 	[XMIT_SZ_256BIT]	= 5,	\ | 
					
						
							|  |  |  | 	[XMIT_SZ_512BIT]	= 6,	\ | 
					
						
							|  |  |  | } | 
					
						
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							|  |  |  | #define TS_LOW_BIT	0x3 /* --xx */
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							|  |  |  | #define TS_HI_BIT	0xc /* xx-- */
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							|  |  |  | #define TS_LOW_SHIFT	(3)
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							|  |  |  | #define TS_HI_SHIFT	(20 - 2)	/* 2 bits for shifted low TS */
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							|  |  |  | #define TS_INDEX2VAL(i) \
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							|  |  |  | 	((((i) & TS_LOW_BIT) << TS_LOW_SHIFT) |\ | 
					
						
							|  |  |  | 	 (((i) & TS_HI_BIT)  << TS_HI_SHIFT)) | 
					
						
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											2014-06-20 14:37:41 +02:00
										 |  |  | #define CHCR_TX(xmit_sz) (DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL((xmit_sz)))
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							|  |  |  | #define CHCR_RX(xmit_sz) (DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL((xmit_sz)))
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											2013-08-02 16:50:38 +02:00
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							|  |  |  | #endif
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