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										 |  |  | /*
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							|  |  |  |  * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com> | 
					
						
							|  |  |  |  * Copyright (C) 2011-2012 Mike Turquette, Linaro Ltd <mturquette@linaro.org> | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * This program is free software; you can redistribute it and/or modify | 
					
						
							|  |  |  |  * it under the terms of the GNU General Public License version 2 as | 
					
						
							|  |  |  |  * published by the Free Software Foundation. | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * Gated clock implementation | 
					
						
							|  |  |  |  */ | 
					
						
							|  |  |  | 
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							|  |  |  | #include <linux/clk-provider.h>
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							|  |  |  | #include <linux/module.h>
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							|  |  |  | #include <linux/slab.h>
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							|  |  |  | #include <linux/io.h>
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							|  |  |  | #include <linux/err.h>
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							|  |  |  | #include <linux/string.h>
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							|  |  |  | /**
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							|  |  |  |  * DOC: basic gatable clock which can gate and ungate it's ouput | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * Traits of this clock: | 
					
						
							|  |  |  |  * prepare - clk_(un)prepare only ensures parent is (un)prepared | 
					
						
							|  |  |  |  * enable - clk_enable and clk_disable are functional & control gating | 
					
						
							|  |  |  |  * rate - inherits rate from parent.  No clk_set_rate support | 
					
						
							|  |  |  |  * parent - fixed parent.  No clk_set_parent support | 
					
						
							|  |  |  |  */ | 
					
						
							|  |  |  | 
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							|  |  |  | #define to_clk_gate(_hw) container_of(_hw, struct clk_gate, hw)
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										 |  |  | /*
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							|  |  |  |  * It works on following logic: | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * For enabling clock, enable = 1 | 
					
						
							|  |  |  |  *	set2dis = 1	-> clear bit	-> set = 0 | 
					
						
							|  |  |  |  *	set2dis = 0	-> set bit	-> set = 1 | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * For disabling clock, enable = 0 | 
					
						
							|  |  |  |  *	set2dis = 1	-> set bit	-> set = 1 | 
					
						
							|  |  |  |  *	set2dis = 0	-> clear bit	-> set = 0 | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * So, result is always: enable xor set2dis. | 
					
						
							|  |  |  |  */ | 
					
						
							|  |  |  | static void clk_gate_endisable(struct clk_hw *hw, int enable) | 
					
						
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										 |  |  | { | 
					
						
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										 |  |  | 	struct clk_gate *gate = to_clk_gate(hw); | 
					
						
							|  |  |  | 	int set = gate->flags & CLK_GATE_SET_TO_DISABLE ? 1 : 0; | 
					
						
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										 |  |  | 	unsigned long flags = 0; | 
					
						
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										 |  |  | 	u32 reg; | 
					
						
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							|  |  |  | 	set ^= enable; | 
					
						
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							|  |  |  | 	if (gate->lock) | 
					
						
							|  |  |  | 		spin_lock_irqsave(gate->lock, flags); | 
					
						
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										 |  |  | 	if (gate->flags & CLK_GATE_HIWORD_MASK) { | 
					
						
							|  |  |  | 		reg = BIT(gate->bit_idx + 16); | 
					
						
							|  |  |  | 		if (set) | 
					
						
							|  |  |  | 			reg |= BIT(gate->bit_idx); | 
					
						
							|  |  |  | 	} else { | 
					
						
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										 |  |  | 		reg = clk_readl(gate->reg); | 
					
						
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							|  |  |  | 		if (set) | 
					
						
							|  |  |  | 			reg |= BIT(gate->bit_idx); | 
					
						
							|  |  |  | 		else | 
					
						
							|  |  |  | 			reg &= ~BIT(gate->bit_idx); | 
					
						
							|  |  |  | 	} | 
					
						
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										 |  |  | 	clk_writel(reg, gate->reg); | 
					
						
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							|  |  |  | 	if (gate->lock) | 
					
						
							|  |  |  | 		spin_unlock_irqrestore(gate->lock, flags); | 
					
						
							|  |  |  | } | 
					
						
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							|  |  |  | static int clk_gate_enable(struct clk_hw *hw) | 
					
						
							|  |  |  | { | 
					
						
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										 |  |  | 	clk_gate_endisable(hw, 1); | 
					
						
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							|  |  |  | 	return 0; | 
					
						
							|  |  |  | } | 
					
						
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							|  |  |  | static void clk_gate_disable(struct clk_hw *hw) | 
					
						
							|  |  |  | { | 
					
						
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										 |  |  | 	clk_gate_endisable(hw, 0); | 
					
						
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										 |  |  | } | 
					
						
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							|  |  |  | static int clk_gate_is_enabled(struct clk_hw *hw) | 
					
						
							|  |  |  | { | 
					
						
							|  |  |  | 	u32 reg; | 
					
						
							|  |  |  | 	struct clk_gate *gate = to_clk_gate(hw); | 
					
						
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										 |  |  | 	reg = clk_readl(gate->reg); | 
					
						
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							|  |  |  | 	/* if a set bit disables this clk, flip it before masking */ | 
					
						
							|  |  |  | 	if (gate->flags & CLK_GATE_SET_TO_DISABLE) | 
					
						
							|  |  |  | 		reg ^= BIT(gate->bit_idx); | 
					
						
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							|  |  |  | 	reg &= BIT(gate->bit_idx); | 
					
						
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							|  |  |  | 	return reg ? 1 : 0; | 
					
						
							|  |  |  | } | 
					
						
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										 |  |  | const struct clk_ops clk_gate_ops = { | 
					
						
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										 |  |  | 	.enable = clk_gate_enable, | 
					
						
							|  |  |  | 	.disable = clk_gate_disable, | 
					
						
							|  |  |  | 	.is_enabled = clk_gate_is_enabled, | 
					
						
							|  |  |  | }; | 
					
						
							|  |  |  | EXPORT_SYMBOL_GPL(clk_gate_ops); | 
					
						
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										 |  |  | /**
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							|  |  |  |  * clk_register_gate - register a gate clock with the clock framework | 
					
						
							|  |  |  |  * @dev: device that is registering this clock | 
					
						
							|  |  |  |  * @name: name of this clock | 
					
						
							|  |  |  |  * @parent_name: name of this clock's parent | 
					
						
							|  |  |  |  * @flags: framework-specific flags for this clock | 
					
						
							|  |  |  |  * @reg: register address to control gating of this clock | 
					
						
							|  |  |  |  * @bit_idx: which bit in the register controls gating of this clock | 
					
						
							|  |  |  |  * @clk_gate_flags: gate-specific flags for this clock | 
					
						
							|  |  |  |  * @lock: shared register lock for this clock | 
					
						
							|  |  |  |  */ | 
					
						
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										 |  |  | struct clk *clk_register_gate(struct device *dev, const char *name, | 
					
						
							|  |  |  | 		const char *parent_name, unsigned long flags, | 
					
						
							|  |  |  | 		void __iomem *reg, u8 bit_idx, | 
					
						
							|  |  |  | 		u8 clk_gate_flags, spinlock_t *lock) | 
					
						
							|  |  |  | { | 
					
						
							|  |  |  | 	struct clk_gate *gate; | 
					
						
							|  |  |  | 	struct clk *clk; | 
					
						
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										 |  |  | 	struct clk_init_data init; | 
					
						
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										 |  |  | 	if (clk_gate_flags & CLK_GATE_HIWORD_MASK) { | 
					
						
							|  |  |  | 		if (bit_idx > 16) { | 
					
						
							|  |  |  | 			pr_err("gate bit exceeds LOWORD field\n"); | 
					
						
							|  |  |  | 			return ERR_PTR(-EINVAL); | 
					
						
							|  |  |  | 		} | 
					
						
							|  |  |  | 	} | 
					
						
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										 |  |  | 	/* allocate the gate */ | 
					
						
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										 |  |  | 	gate = kzalloc(sizeof(struct clk_gate), GFP_KERNEL); | 
					
						
							|  |  |  | 	if (!gate) { | 
					
						
							|  |  |  | 		pr_err("%s: could not allocate gated clk\n", __func__); | 
					
						
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										 |  |  | 		return ERR_PTR(-ENOMEM); | 
					
						
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										 |  |  | 	} | 
					
						
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										 |  |  | 	init.name = name; | 
					
						
							|  |  |  | 	init.ops = &clk_gate_ops; | 
					
						
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										 |  |  | 	init.flags = flags | CLK_IS_BASIC; | 
					
						
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										 |  |  | 	init.parent_names = (parent_name ? &parent_name: NULL); | 
					
						
							|  |  |  | 	init.num_parents = (parent_name ? 1 : 0); | 
					
						
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										 |  |  | 	/* struct clk_gate assignments */ | 
					
						
							|  |  |  | 	gate->reg = reg; | 
					
						
							|  |  |  | 	gate->bit_idx = bit_idx; | 
					
						
							|  |  |  | 	gate->flags = clk_gate_flags; | 
					
						
							|  |  |  | 	gate->lock = lock; | 
					
						
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										 |  |  | 	gate->hw.init = &init; | 
					
						
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										 |  |  | 	clk = clk_register(dev, &gate->hw); | 
					
						
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										 |  |  | 	if (IS_ERR(clk)) | 
					
						
							|  |  |  | 		kfree(gate); | 
					
						
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							|  |  |  | 	return clk; | 
					
						
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										 |  |  | } | 
					
						
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										 |  |  | EXPORT_SYMBOL_GPL(clk_register_gate); |