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										 |  |  | /*
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							|  |  |  |  * linux/include/arm/hardware/it8152.h | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * Copyright Compulab Ltd., 2006,2007 | 
					
						
							|  |  |  |  * Mike Rapoport <mike@compulab.co.il> | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * ITE 8152 companion chip register definitions | 
					
						
							|  |  |  |  */ | 
					
						
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							|  |  |  | #ifndef __ASM_HARDWARE_IT8152_H
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							|  |  |  | #define __ASM_HARDWARE_IT8152_H
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							|  |  |  | #include <mach/irqs.h>
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										 |  |  | extern void __iomem *it8152_base_address; | 
					
						
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							|  |  |  | #define IT8152_IO_BASE			(it8152_base_address + 0x03e00000)
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							|  |  |  | #define IT8152_CFGREG_BASE		(it8152_base_address + 0x03f00000)
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							|  |  |  | #define __REG_IT8152(x)			(it8152_base_address + (x))
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							|  |  |  | #define IT8152_PCI_CFG_ADDR		__REG_IT8152(0x3f00800)
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							|  |  |  | #define IT8152_PCI_CFG_DATA		__REG_IT8152(0x3f00804)
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							|  |  |  | #define IT8152_INTC_LDCNIRR		__REG_IT8152(0x3f00300)
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							|  |  |  | #define IT8152_INTC_LDPNIRR		__REG_IT8152(0x3f00304)
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							|  |  |  | #define IT8152_INTC_LDCNIMR		__REG_IT8152(0x3f00308)
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							|  |  |  | #define IT8152_INTC_LDPNIMR		__REG_IT8152(0x3f0030C)
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							|  |  |  | #define IT8152_INTC_LDNITR		__REG_IT8152(0x3f00310)
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							|  |  |  | #define IT8152_INTC_LDNIAR		__REG_IT8152(0x3f00314)
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							|  |  |  | #define IT8152_INTC_LPCNIRR		__REG_IT8152(0x3f00320)
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							|  |  |  | #define IT8152_INTC_LPPNIRR		__REG_IT8152(0x3f00324)
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							|  |  |  | #define IT8152_INTC_LPCNIMR		__REG_IT8152(0x3f00328)
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							|  |  |  | #define IT8152_INTC_LPPNIMR		__REG_IT8152(0x3f0032C)
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							|  |  |  | #define IT8152_INTC_LPNITR		__REG_IT8152(0x3f00330)
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							|  |  |  | #define IT8152_INTC_LPNIAR		__REG_IT8152(0x3f00334)
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							|  |  |  | #define IT8152_INTC_PDCNIRR		__REG_IT8152(0x3f00340)
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							|  |  |  | #define IT8152_INTC_PDPNIRR		__REG_IT8152(0x3f00344)
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							|  |  |  | #define IT8152_INTC_PDCNIMR		__REG_IT8152(0x3f00348)
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							|  |  |  | #define IT8152_INTC_PDPNIMR		__REG_IT8152(0x3f0034C)
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							|  |  |  | #define IT8152_INTC_PDNITR		__REG_IT8152(0x3f00350)
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							|  |  |  | #define IT8152_INTC_PDNIAR		__REG_IT8152(0x3f00354)
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							|  |  |  | #define IT8152_INTC_INTC_TYPER		__REG_IT8152(0x3f003FC)
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							|  |  |  | #define IT8152_GPIO_GPDR		__REG_IT8152(0x3f00500)
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							|  |  |  | /*
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										 |  |  |   Interrupt controller per register summary: | 
					
						
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										 |  |  |   --------------------------------------- | 
					
						
							|  |  |  |   LCDNIRR: | 
					
						
							|  |  |  |   IT8152_LD_IRQ(8) PCICLK stop | 
					
						
							|  |  |  |   IT8152_LD_IRQ(7) MCLK ready | 
					
						
							|  |  |  |   IT8152_LD_IRQ(6) s/w | 
					
						
							|  |  |  |   IT8152_LD_IRQ(5) UART | 
					
						
							|  |  |  |   IT8152_LD_IRQ(4) GPIO | 
					
						
							|  |  |  |   IT8152_LD_IRQ(3) TIMER 4 | 
					
						
							|  |  |  |   IT8152_LD_IRQ(2) TIMER 3 | 
					
						
							|  |  |  |   IT8152_LD_IRQ(1) TIMER 2 | 
					
						
							|  |  |  |   IT8152_LD_IRQ(0) TIMER 1 | 
					
						
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							|  |  |  |   LPCNIRR: | 
					
						
							|  |  |  |   IT8152_LP_IRQ(x) serial IRQ x | 
					
						
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							|  |  |  |   PCIDNIRR: | 
					
						
							|  |  |  |   IT8152_PD_IRQ(14) PCISERR | 
					
						
							|  |  |  |   IT8152_PD_IRQ(13) CPU/PCI bridge target abort (h2pTADR) | 
					
						
							|  |  |  |   IT8152_PD_IRQ(12) CPU/PCI bridge master abort (h2pMADR) | 
					
						
							|  |  |  |   IT8152_PD_IRQ(11) PCI INTD | 
					
						
							|  |  |  |   IT8152_PD_IRQ(10) PCI INTC | 
					
						
							|  |  |  |   IT8152_PD_IRQ(9)  PCI INTB | 
					
						
							|  |  |  |   IT8152_PD_IRQ(8)  PCI INTA | 
					
						
							|  |  |  |   IT8152_PD_IRQ(7)  serial INTD | 
					
						
							|  |  |  |   IT8152_PD_IRQ(6)  serial INTC | 
					
						
							|  |  |  |   IT8152_PD_IRQ(5)  serial INTB | 
					
						
							|  |  |  |   IT8152_PD_IRQ(4)  serial INTA | 
					
						
							|  |  |  |   IT8152_PD_IRQ(3)  serial IRQ IOCHK (IOCHKR) | 
					
						
							|  |  |  |   IT8152_PD_IRQ(2)  chaining DMA (CDMAR) | 
					
						
							|  |  |  |   IT8152_PD_IRQ(1)  USB (USBR) | 
					
						
							|  |  |  |   IT8152_PD_IRQ(0)  Audio controller (ACR) | 
					
						
							|  |  |  |  */ | 
					
						
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										 |  |  | #define IT8152_IRQ(x)   (IRQ_BOARD_START + (x))
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										 |  |  | #define IT8152_LAST_IRQ	(IRQ_BOARD_START + 40)
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							|  |  |  | /* IRQ-sources in 3 groups - local devices, LPC (serial), and external PCI */ | 
					
						
							|  |  |  | #define IT8152_LD_IRQ_COUNT     9
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							|  |  |  | #define IT8152_LP_IRQ_COUNT     16
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							|  |  |  | #define IT8152_PD_IRQ_COUNT     15
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							|  |  |  | /* Priorities: */ | 
					
						
							|  |  |  | #define IT8152_PD_IRQ(i)        IT8152_IRQ(i)
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							|  |  |  | #define IT8152_LP_IRQ(i)        (IT8152_IRQ(i) + IT8152_PD_IRQ_COUNT)
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							|  |  |  | #define IT8152_LD_IRQ(i)        (IT8152_IRQ(i) + IT8152_PD_IRQ_COUNT + IT8152_LP_IRQ_COUNT)
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										 |  |  | /* frequently used interrupts */ | 
					
						
							|  |  |  | #define IT8152_PCISERR		IT8152_PD_IRQ(14)
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							|  |  |  | #define IT8152_H2PTADR		IT8152_PD_IRQ(13)
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							|  |  |  | #define IT8152_H2PMAR		IT8152_PD_IRQ(12)
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							|  |  |  | #define IT8152_PCI_INTD		IT8152_PD_IRQ(11)
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							|  |  |  | #define IT8152_PCI_INTC		IT8152_PD_IRQ(10)
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							|  |  |  | #define IT8152_PCI_INTB		IT8152_PD_IRQ(9)
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							|  |  |  | #define IT8152_PCI_INTA		IT8152_PD_IRQ(8)
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							|  |  |  | #define IT8152_CDMA_INT		IT8152_PD_IRQ(2)
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							|  |  |  | #define IT8152_USB_INT		IT8152_PD_IRQ(1)
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							|  |  |  | #define IT8152_AUDIO_INT	IT8152_PD_IRQ(0)
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							|  |  |  | struct pci_dev; | 
					
						
							|  |  |  | struct pci_sys_data; | 
					
						
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							|  |  |  | extern void it8152_irq_demux(unsigned int irq, struct irq_desc *desc); | 
					
						
							|  |  |  | extern void it8152_init_irq(void); | 
					
						
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										 |  |  | extern int it8152_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin); | 
					
						
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										 |  |  | extern int it8152_pci_setup(int nr, struct pci_sys_data *sys); | 
					
						
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										 |  |  | extern struct pci_ops it8152_ops; | 
					
						
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							|  |  |  | #endif /* __ASM_HARDWARE_IT8152_H */
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