2012-02-13 12:58:53 +08:00
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/*
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* Header file for the Atmel RAM Controller
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*
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* Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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*
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* Under GPLv2 only
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*/
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#ifndef __AT91_RAMC_H__
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#define __AT91_RAMC_H__
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#ifndef __ASSEMBLY__
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extern void __iomem *at91_ramc_base[];
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#define at91_ramc_read(id, field) \
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__raw_readl(at91_ramc_base[id] + field)
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#define at91_ramc_write(id, field, value) \
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__raw_writel(value, at91_ramc_base[id] + field)
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#else
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.extern at91_ramc_base
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#endif
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2012-02-22 17:50:55 +01:00
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#define AT91_MEMCTRL_MC 0
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#define AT91_MEMCTRL_SDRAMC 1
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#define AT91_MEMCTRL_DDRSDR 2
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#include <mach/at91rm9200_sdramc.h>
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2012-02-13 12:58:53 +08:00
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#include <mach/at91sam9_ddrsdr.h>
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#include <mach/at91sam9_sdramc.h>
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#endif /* __AT91_RAMC_H__ */
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