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											2005-04-16 15:20:36 -07:00
										 |  |  | /***************************************************************/ | 
					
						
							|  |  |  | /*  $Id: hfc4s8s_l1.h,v 1.1 2005/02/02 17:28:55 martinb1 Exp $ */ | 
					
						
							|  |  |  | /*                                                             */ | 
					
						
							|  |  |  | /*  This file is a minimal required extraction of hfc48scu.h   */ | 
					
						
							|  |  |  | /*  (Genero 3.2, HFC XML 1.7a for HFC-E1, HFC-4S and HFC-8S)   */ | 
					
						
							|  |  |  | /*                                                             */ | 
					
						
							|  |  |  | /*  To get this complete register description contact          */ | 
					
						
							|  |  |  | /*  Cologne Chip AG :                                          */ | 
					
						
							|  |  |  | /*  Internet:  http://www.colognechip.com/                     */ | 
					
						
							|  |  |  | /*  E-Mail:    info@colognechip.com                            */ | 
					
						
							|  |  |  | /***************************************************************/ | 
					
						
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							|  |  |  | #ifndef _HFC4S8S_L1_H_
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							|  |  |  | #define _HFC4S8S_L1_H_
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							|  |  |  | /*
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							|  |  |  | *  include Genero generated HFC-4S/8S header file hfc48scu.h | 
					
						
							| 
									
										
										
										
											2006-11-30 05:24:39 +01:00
										 |  |  | *  for complete register description. This will define _HFC48SCU_H_ | 
					
						
							| 
									
										
										
										
											2005-04-16 15:20:36 -07:00
										 |  |  | *  to prevent redefinitions | 
					
						
							|  |  |  | */ | 
					
						
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							|  |  |  | // #include "hfc48scu.h"
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							|  |  |  | #ifndef _HFC48SCU_H_
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							|  |  |  | #define _HFC48SCU_H_
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							|  |  |  | #ifndef PCI_VENDOR_ID_CCD
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							|  |  |  | #define PCI_VENDOR_ID_CCD	0x1397
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							|  |  |  | #endif
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							|  |  |  | #define CHIP_ID_4S		0x0C
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							|  |  |  | #define CHIP_ID_8S		0x08
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							|  |  |  | #define PCI_DEVICE_ID_4S	0x08B4
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							|  |  |  | #define PCI_DEVICE_ID_8S	0x16B8
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							|  |  |  | #define R_IRQ_MISC	0x11
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							|  |  |  | #define M_TI_IRQ	0x02
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							|  |  |  | #define A_ST_RD_STA	0x30
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							|  |  |  | #define A_ST_WR_STA	0x30
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							|  |  |  | #define M_SET_G2_G3	0x80
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							|  |  |  | #define A_ST_CTRL0	0x31
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							|  |  |  | #define A_ST_CTRL2	0x33
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							|  |  |  | #define A_ST_CLK_DLY	0x37
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							|  |  |  | #define A_Z1		0x04
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							|  |  |  | #define A_Z2		0x06
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							|  |  |  | #define R_CIRM		0x00
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							|  |  |  | #define M_SRES		0x08
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							|  |  |  | #define R_CTRL		0x01
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							|  |  |  | #define R_BRG_PCM_CFG	0x02
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							|  |  |  | #define M_PCM_CLK	0x20
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							|  |  |  | #define R_RAM_MISC	0x0C
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							|  |  |  | #define M_FZ_MD		0x80
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							|  |  |  | #define R_FIFO_MD	0x0D
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							|  |  |  | #define A_INC_RES_FIFO	0x0E
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							|  |  |  | #define R_FIFO		0x0F
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							|  |  |  | #define A_F1		0x0C
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							|  |  |  | #define A_F2		0x0D
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							|  |  |  | #define R_IRQ_OVIEW	0x10
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							|  |  |  | #define R_CHIP_ID	0x16
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							|  |  |  | #define R_STATUS	0x1C
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							|  |  |  | #define M_BUSY		0x01
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							|  |  |  | #define M_MISC_IRQSTA	0x40
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							|  |  |  | #define M_FR_IRQSTA	0x80
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							|  |  |  | #define R_CHIP_RV	0x1F
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							|  |  |  | #define R_IRQ_CTRL	0x13
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							|  |  |  | #define M_FIFO_IRQ	0x01
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							|  |  |  | #define M_GLOB_IRQ_EN	0x08
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							|  |  |  | #define R_PCM_MD0	0x14
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							|  |  |  | #define M_PCM_MD	0x01
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							|  |  |  | #define A_FIFO_DATA0	0x80
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							|  |  |  | #define R_TI_WD		0x1A
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							|  |  |  | #define R_PWM1		0x39
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							|  |  |  | #define R_PWM_MD	0x46
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							|  |  |  | #define R_IRQ_FIFO_BL0	0xC8
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							|  |  |  | #define A_CON_HDLC	0xFA
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							|  |  |  | #define A_SUBCH_CFG	0xFB
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							|  |  |  | #define A_IRQ_MSK	0xFF
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							|  |  |  | #define R_SCI_MSK	0x12
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							|  |  |  | #define R_ST_SEL	0x16
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							|  |  |  | #define R_ST_SYNC	0x17
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							|  |  |  | #define M_AUTO_SYNC	0x08
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							|  |  |  | #define R_SCI		0x12
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							|  |  |  | #define R_IRQMSK_MISC	0x11
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							|  |  |  | #define M_TI_IRQMSK	0x02
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							|  |  |  | #endif	/* _HFC4S8S_L1_H_ */
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							|  |  |  | #endif	/* _HFC48SCU_H_ */
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