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											2008-10-15 22:01:16 -07:00
										 |  |  | /*
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							|  |  |  |  *  linux/arch/h8300/kernel/timer/tpu.c | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  *  Yoshinori Sato <ysato@users.sourceforge.jp> | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  *  TPU Timer Handler | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  */ | 
					
						
							|  |  |  | 
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							|  |  |  | #include <linux/errno.h>
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							|  |  |  | #include <linux/sched.h>
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							|  |  |  | #include <linux/kernel.h>
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							|  |  |  | #include <linux/param.h>
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							|  |  |  | #include <linux/string.h>
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							|  |  |  | #include <linux/mm.h>
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							|  |  |  | #include <linux/interrupt.h>
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							|  |  |  | #include <linux/init.h>
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							|  |  |  | #include <linux/timex.h>
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							|  |  |  | #include <asm/segment.h>
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							|  |  |  | #include <asm/io.h>
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							|  |  |  | #include <asm/irq.h>
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							|  |  |  | #include <asm/regs267x.h>
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							|  |  |  | /* TPU */ | 
					
						
							|  |  |  | #if CONFIG_H8300_TPU_CH == 0
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							|  |  |  | #define TPUBASE	0xffffd0
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							|  |  |  | #define TPUIRQ	40
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							|  |  |  | #elif CONFIG_H8300_TPU_CH == 1
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							|  |  |  | #define TPUBASE	0xffffe0
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							|  |  |  | #define TPUIRQ	48
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							|  |  |  | #elif CONFIG_H8300_TPU_CH == 2
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							|  |  |  | #define TPUBASE	0xfffff0
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							|  |  |  | #define TPUIRQ	52
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							|  |  |  | #elif CONFIG_H8300_TPU_CH == 3
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							|  |  |  | #define TPUBASE	0xfffe80
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							|  |  |  | #define TPUIRQ	56
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							|  |  |  | #elif CONFIG_H8300_TPU_CH == 4
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							|  |  |  | #define TPUBASE	0xfffe90
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							|  |  |  | #define TPUIRQ	64
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							|  |  |  | #else
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							|  |  |  | #error Unknown timer channel.
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							|  |  |  | #endif
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							|  |  |  | #define _TCR	0
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							|  |  |  | #define _TMDR	1
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							|  |  |  | #define _TIOR	2
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							|  |  |  | #define _TIER	4
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							|  |  |  | #define _TSR	5
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							|  |  |  | #define _TCNT	6
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							|  |  |  | #define _GRA	8
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							|  |  |  | #define _GRB	10
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							|  |  |  | #define CCLR0	0x20
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							|  |  |  | static irqreturn_t timer_interrupt(int irq, void *dev_id) | 
					
						
							|  |  |  | { | 
					
						
							|  |  |  | 	h8300_timer_tick(); | 
					
						
							|  |  |  | 	ctrl_bclr(0, TPUBASE + _TSR); | 
					
						
							|  |  |  | 	return IRQ_HANDLED; | 
					
						
							|  |  |  | } | 
					
						
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							|  |  |  | static struct irqaction tpu_irq = { | 
					
						
							|  |  |  | 	.name		= "tpu", | 
					
						
							|  |  |  | 	.handler	= timer_interrupt, | 
					
						
							|  |  |  | 	.flags		= IRQF_DISABLED | IRQF_TIMER, | 
					
						
							|  |  |  | }; | 
					
						
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											2009-02-09 21:39:32 +01:00
										 |  |  | static const int __initdata divide_rate[] = { | 
					
						
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											2008-10-15 22:01:16 -07:00
										 |  |  | #if CONFIG_H8300_TPU_CH == 0
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							|  |  |  | 	1,4,16,64,0,0,0,0, | 
					
						
							|  |  |  | #elif (CONFIG_H8300_TPU_CH == 1) || (CONFIG_H8300_TPU_CH == 5)
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							|  |  |  | 	1,4,16,64,0,0,256,0, | 
					
						
							|  |  |  | #elif (CONFIG_H8300_TPU_CH == 2) || (CONFIG_H8300_TPU_CH == 4)
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							|  |  |  | 	1,4,16,64,0,0,0,1024, | 
					
						
							|  |  |  | #elif CONFIG_H8300_TPU_CH == 3
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							|  |  |  | 	1,4,16,64,0,1024,256,4096, | 
					
						
							|  |  |  | #endif
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							|  |  |  | }; | 
					
						
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							|  |  |  | void __init h8300_timer_setup(void) | 
					
						
							|  |  |  | { | 
					
						
							|  |  |  | 	unsigned int cnt; | 
					
						
							|  |  |  | 	unsigned int div; | 
					
						
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							|  |  |  | 	calc_param(cnt, div, divide_rate, 0x10000); | 
					
						
							|  |  |  | 
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							|  |  |  | 	setup_irq(TPUIRQ, &tpu_irq); | 
					
						
							|  |  |  | 
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							|  |  |  | 	/* TPU module enabled */ | 
					
						
							|  |  |  | 	ctrl_bclr(3, MSTPCRH); | 
					
						
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							|  |  |  | 	ctrl_outb(0, TSTR); | 
					
						
							|  |  |  | 	ctrl_outb(CCLR0 | div, TPUBASE + _TCR); | 
					
						
							|  |  |  | 	ctrl_outb(0, TPUBASE + _TMDR); | 
					
						
							|  |  |  | 	ctrl_outw(0, TPUBASE + _TIOR); | 
					
						
							|  |  |  | 	ctrl_outb(0x01, TPUBASE + _TIER); | 
					
						
							|  |  |  | 	ctrl_outw(cnt, TPUBASE + _GRA); | 
					
						
							|  |  |  | 	ctrl_bset(CONFIG_H8300_TPU_CH, TSTR); | 
					
						
							|  |  |  | } |