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										 |  |  | /* arch/arm/mach-s5pc100/include/mach/gpio.h
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							|  |  |  |  * | 
					
						
							|  |  |  |  * Copyright 2009 Samsung Electronics Co. | 
					
						
							|  |  |  |  *	Byungho Min <bhmin@samsung.com> | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * S5PC100 - GPIO lib support | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * Base on mach-s3c6400/include/mach/gpio.h | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * This program is free software; you can redistribute it and/or modify | 
					
						
							|  |  |  |  * it under the terms of the GNU General Public License version 2 as | 
					
						
							|  |  |  |  * published by the Free Software Foundation. | 
					
						
							|  |  |  | */ | 
					
						
							|  |  |  | 
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							|  |  |  | #define gpio_get_value	__gpio_get_value
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							|  |  |  | #define gpio_set_value	__gpio_set_value
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							|  |  |  | #define gpio_cansleep	__gpio_cansleep
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							|  |  |  | #define gpio_to_irq	__gpio_to_irq
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							|  |  |  | /* GPIO bank sizes */ | 
					
						
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										 |  |  | #define S5PC100_GPIO_A0_NR	(8)
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							|  |  |  | #define S5PC100_GPIO_A1_NR	(5)
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							|  |  |  | #define S5PC100_GPIO_B_NR	(8)
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							|  |  |  | #define S5PC100_GPIO_C_NR	(5)
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							|  |  |  | #define S5PC100_GPIO_D_NR	(7)
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							|  |  |  | #define S5PC100_GPIO_E0_NR	(8)
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							|  |  |  | #define S5PC100_GPIO_E1_NR	(6)
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							|  |  |  | #define S5PC100_GPIO_F0_NR	(8)
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							|  |  |  | #define S5PC100_GPIO_F1_NR	(8)
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							|  |  |  | #define S5PC100_GPIO_F2_NR	(8)
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							|  |  |  | #define S5PC100_GPIO_F3_NR	(4)
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							|  |  |  | #define S5PC100_GPIO_G0_NR	(8)
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							|  |  |  | #define S5PC100_GPIO_G1_NR	(3)
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							|  |  |  | #define S5PC100_GPIO_G2_NR	(7)
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							|  |  |  | #define S5PC100_GPIO_G3_NR	(7)
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							|  |  |  | #define S5PC100_GPIO_H0_NR	(8)
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							|  |  |  | #define S5PC100_GPIO_H1_NR	(8)
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							|  |  |  | #define S5PC100_GPIO_H2_NR	(8)
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							|  |  |  | #define S5PC100_GPIO_H3_NR	(8)
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							|  |  |  | #define S5PC100_GPIO_I_NR	(8)
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							|  |  |  | #define S5PC100_GPIO_J0_NR	(8)
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							|  |  |  | #define S5PC100_GPIO_J1_NR	(5)
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							|  |  |  | #define S5PC100_GPIO_J2_NR	(8)
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							|  |  |  | #define S5PC100_GPIO_J3_NR	(8)
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							|  |  |  | #define S5PC100_GPIO_J4_NR	(4)
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							|  |  |  | #define S5PC100_GPIO_K0_NR	(8)
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							|  |  |  | #define S5PC100_GPIO_K1_NR	(6)
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							|  |  |  | #define S5PC100_GPIO_K2_NR	(8)
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							|  |  |  | #define S5PC100_GPIO_K3_NR	(8)
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							|  |  |  | #define S5PC100_GPIO_L0_NR	(8)
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							|  |  |  | #define S5PC100_GPIO_L1_NR	(8)
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							|  |  |  | #define S5PC100_GPIO_L2_NR	(8)
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							|  |  |  | #define S5PC100_GPIO_L3_NR	(8)
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							|  |  |  | #define S5PC100_GPIO_L4_NR	(8)
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							|  |  |  | #define S5PC100_GPIO_MP00_NR	(8)
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							|  |  |  | #define S5PC100_GPIO_MP01_NR	(8)
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							|  |  |  | #define S5PC100_GPIO_MP02_NR	(8)
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							|  |  |  | #define S5PC100_GPIO_MP03_NR	(8)
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							|  |  |  | #define S5PC100_GPIO_MP04_NR	(5)
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							|  |  |  | /* GPIO bank numbes */ | 
					
						
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							|  |  |  | /* CONFIG_S3C_GPIO_SPACE allows the user to select extra
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							|  |  |  |  * space for debugging purposes so that any accidental | 
					
						
							|  |  |  |  * change from one gpio bank to another can be caught. | 
					
						
							|  |  |  | */ | 
					
						
							|  |  |  | 
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							|  |  |  | #define S5PC1XX_GPIO_NEXT(__gpio) \
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							|  |  |  | 	((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1) | 
					
						
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							|  |  |  | enum s3c_gpio_number { | 
					
						
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										 |  |  | 	S5PC100_GPIO_A0_START	= 0, | 
					
						
							|  |  |  | 	S5PC100_GPIO_A1_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_A0), | 
					
						
							|  |  |  | 	S5PC100_GPIO_B_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_A1), | 
					
						
							|  |  |  | 	S5PC100_GPIO_C_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_B), | 
					
						
							|  |  |  | 	S5PC100_GPIO_D_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_C), | 
					
						
							|  |  |  | 	S5PC100_GPIO_E0_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_D), | 
					
						
							|  |  |  | 	S5PC100_GPIO_E1_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_E0), | 
					
						
							|  |  |  | 	S5PC100_GPIO_F0_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_E1), | 
					
						
							|  |  |  | 	S5PC100_GPIO_F1_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_F0), | 
					
						
							|  |  |  | 	S5PC100_GPIO_F2_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_F1), | 
					
						
							|  |  |  | 	S5PC100_GPIO_F3_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_F2), | 
					
						
							|  |  |  | 	S5PC100_GPIO_G0_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_F3), | 
					
						
							|  |  |  | 	S5PC100_GPIO_G1_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_G0), | 
					
						
							|  |  |  | 	S5PC100_GPIO_G2_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_G1), | 
					
						
							|  |  |  | 	S5PC100_GPIO_G3_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_G2), | 
					
						
							|  |  |  | 	S5PC100_GPIO_H0_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_G3), | 
					
						
							|  |  |  | 	S5PC100_GPIO_H1_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_H0), | 
					
						
							|  |  |  | 	S5PC100_GPIO_H2_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_H1), | 
					
						
							|  |  |  | 	S5PC100_GPIO_H3_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_H2), | 
					
						
							|  |  |  | 	S5PC100_GPIO_I_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_H3), | 
					
						
							|  |  |  | 	S5PC100_GPIO_J0_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_I), | 
					
						
							|  |  |  | 	S5PC100_GPIO_J1_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_J0), | 
					
						
							|  |  |  | 	S5PC100_GPIO_J2_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_J1), | 
					
						
							|  |  |  | 	S5PC100_GPIO_J3_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_J2), | 
					
						
							|  |  |  | 	S5PC100_GPIO_J4_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_J3), | 
					
						
							|  |  |  | 	S5PC100_GPIO_K0_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_J4), | 
					
						
							|  |  |  | 	S5PC100_GPIO_K1_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_K0), | 
					
						
							|  |  |  | 	S5PC100_GPIO_K2_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_K1), | 
					
						
							|  |  |  | 	S5PC100_GPIO_K3_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_K2), | 
					
						
							|  |  |  | 	S5PC100_GPIO_L0_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_K3), | 
					
						
							|  |  |  | 	S5PC100_GPIO_L1_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_L0), | 
					
						
							|  |  |  | 	S5PC100_GPIO_L2_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_L1), | 
					
						
							|  |  |  | 	S5PC100_GPIO_L3_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_L2), | 
					
						
							|  |  |  | 	S5PC100_GPIO_L4_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_L3), | 
					
						
							|  |  |  | 	S5PC100_GPIO_MP00_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_L4), | 
					
						
							|  |  |  | 	S5PC100_GPIO_MP01_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_MP00), | 
					
						
							|  |  |  | 	S5PC100_GPIO_MP02_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_MP01), | 
					
						
							|  |  |  | 	S5PC100_GPIO_MP03_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_MP02), | 
					
						
							|  |  |  | 	S5PC100_GPIO_MP04_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_MP03), | 
					
						
							|  |  |  | 	S5PC100_GPIO_END	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_MP04), | 
					
						
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										 |  |  | }; | 
					
						
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										 |  |  | /* S5PC100 GPIO number definitions. */ | 
					
						
							|  |  |  | #define S5PC100_GPA0(_nr)	(S5PC100_GPIO_A0_START + (_nr))
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							|  |  |  | #define S5PC100_GPA1(_nr)	(S5PC100_GPIO_A1_START + (_nr))
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							|  |  |  | #define S5PC100_GPB(_nr)	(S5PC100_GPIO_B_START + (_nr))
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							|  |  |  | #define S5PC100_GPC(_nr)	(S5PC100_GPIO_C_START + (_nr))
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							|  |  |  | #define S5PC100_GPD(_nr)	(S5PC100_GPIO_D_START + (_nr))
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							|  |  |  | #define S5PC100_GPE0(_nr)	(S5PC100_GPIO_E0_START + (_nr))
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							|  |  |  | #define S5PC100_GPE1(_nr)	(S5PC100_GPIO_E1_START + (_nr))
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							|  |  |  | #define S5PC100_GPF0(_nr)	(S5PC100_GPIO_F0_START + (_nr))
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							|  |  |  | #define S5PC100_GPF1(_nr)	(S5PC100_GPIO_F1_START + (_nr))
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							|  |  |  | #define S5PC100_GPF2(_nr)	(S5PC100_GPIO_F2_START + (_nr))
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							|  |  |  | #define S5PC100_GPF3(_nr)	(S5PC100_GPIO_F3_START + (_nr))
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							|  |  |  | #define S5PC100_GPG0(_nr)	(S5PC100_GPIO_G0_START + (_nr))
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							|  |  |  | #define S5PC100_GPG1(_nr)	(S5PC100_GPIO_G1_START + (_nr))
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							|  |  |  | #define S5PC100_GPG2(_nr)	(S5PC100_GPIO_G2_START + (_nr))
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							|  |  |  | #define S5PC100_GPG3(_nr)	(S5PC100_GPIO_G3_START + (_nr))
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							|  |  |  | #define S5PC100_GPH0(_nr)	(S5PC100_GPIO_H0_START + (_nr))
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							|  |  |  | #define S5PC100_GPH1(_nr)	(S5PC100_GPIO_H1_START + (_nr))
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							|  |  |  | #define S5PC100_GPH2(_nr)	(S5PC100_GPIO_H2_START + (_nr))
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							|  |  |  | #define S5PC100_GPH3(_nr)	(S5PC100_GPIO_H3_START + (_nr))
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							|  |  |  | #define S5PC100_GPI(_nr)	(S5PC100_GPIO_I_START + (_nr))
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							|  |  |  | #define S5PC100_GPJ0(_nr)	(S5PC100_GPIO_J0_START + (_nr))
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							|  |  |  | #define S5PC100_GPJ1(_nr)	(S5PC100_GPIO_J1_START + (_nr))
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							|  |  |  | #define S5PC100_GPJ2(_nr)	(S5PC100_GPIO_J2_START + (_nr))
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							|  |  |  | #define S5PC100_GPJ3(_nr)	(S5PC100_GPIO_J3_START + (_nr))
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							|  |  |  | #define S5PC100_GPJ4(_nr)	(S5PC100_GPIO_J4_START + (_nr))
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							|  |  |  | #define S5PC100_GPK0(_nr)	(S5PC100_GPIO_K0_START + (_nr))
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							|  |  |  | #define S5PC100_GPK1(_nr)	(S5PC100_GPIO_K1_START + (_nr))
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							|  |  |  | #define S5PC100_GPK2(_nr)	(S5PC100_GPIO_K2_START + (_nr))
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							|  |  |  | #define S5PC100_GPK3(_nr)	(S5PC100_GPIO_K3_START + (_nr))
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							|  |  |  | #define S5PC100_GPL0(_nr)	(S5PC100_GPIO_L0_START + (_nr))
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							|  |  |  | #define S5PC100_GPL1(_nr)	(S5PC100_GPIO_L1_START + (_nr))
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							|  |  |  | #define S5PC100_GPL2(_nr)	(S5PC100_GPIO_L2_START + (_nr))
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							|  |  |  | #define S5PC100_GPL3(_nr)	(S5PC100_GPIO_L3_START + (_nr))
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							|  |  |  | #define S5PC100_GPL4(_nr)	(S5PC100_GPIO_L4_START + (_nr))
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							|  |  |  | #define S5PC100_MP00(_nr)	(S5PC100_GPIO_MP00_START + (_nr))
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							|  |  |  | #define S5PC100_MP01(_nr)	(S5PC100_GPIO_MP01_START + (_nr))
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							|  |  |  | #define S5PC100_MP02(_nr)	(S5PC100_GPIO_MP02_START + (_nr))
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							|  |  |  | #define S5PC100_MP03(_nr)	(S5PC100_GPIO_MP03_START + (_nr))
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							|  |  |  | #define S5PC100_MP04(_nr)	(S5PC100_GPIO_MP04_START + (_nr))
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							|  |  |  | #define S5PC100_MP05(_nr)	(S5PC100_GPIO_MP05_START + (_nr))
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										 |  |  | /* It used the end of the S5PC1XX gpios */ | 
					
						
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										 |  |  | #define S3C_GPIO_END		S5PC100_GPIO_END
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							|  |  |  | /* define the number of gpios we need to the one after the MP04() range */ | 
					
						
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										 |  |  | #define ARCH_NR_GPIOS		(S5PC100_GPIO_END + 1)
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										 |  |  | 
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							|  |  |  | #include <asm-generic/gpio.h>
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