| 
									
										
											  
											
												[ARM] pxa: add MFP-alike pin configuration support for pxa{25x, 27x}
Pin configuration on pxa{25x,27x} has now separated from generic GPIO
into dedicated mfp-pxa2xx.c by this patch. The name "mfp" is borrowed
from pxa3xx and is used here to alert the difference between the two
concepts: pin configuration and generic GPIOs.  A GPIO can be called
a "GPIO" _only_ when the corresponding pin is configured so.
A pin configuration on pxa{25x,27x} is composed of:
    - alternate function selection (or pin mux as commonly called)
    - low power state or sleep state
    - wakeup enabling from low power mode
The following MFP_xxx bit definitions in mfp.h are re-used:
    - MFP_PIN(x)
    - MFP_AFx
    - MFP_LPM_DRIVE_{LOW, HIGH}
    - MFP_LPM_EDGE_*
Selecting alternate function on pxa{25x, 27x} involves configuration
of GPIO direction register GPDRx, so a new bit and MFP_DIR_{IN, OUT}
are introduced. And pin configurations are defined by the following
two macros:
    - MFP_CFG_IN  : for input alternate functions
    - MFP_CFG_OUT : for output alternate functions
Every configuration should provide a low power state if it configured
as output using MFP_CFG_OUT().  As a general guideline, the low power
state should be decided to minimize the overall power dissipation. As
an example, it is better to drive the pin as high level in low power
mode if the GPIO is configured as an active low chip select.
Pins configured as GPIO are defined by MFP_CFG_IN(). This is to avoid
side effects when it is firstly configured as output.  The actual
direction of the GPIO is configured by gpio_direction_{input, output}
Wakeup enabling on pxa{25x, 27x} is actually GPIO based wakeup, thus
the device based enable_irq_wake() mechanism is not applicable here.
E.g.  invoking enable_irq_wake() with a GPIO IRQ as in the following
code to enable OTG wakeup is by no means portable and intuitive, and
it is valid _only_ when GPIO35 is configured as USB_P2_1:
    enable_irq_wake( gpio_to_irq(35) );
To make things worse, not every GPIO is able to wakeup the system.
Only a small number of them can, on either rising or falling edge,
or when level is high (for keypad GPIOs).
Thus, another new bit is introduced to indicate that the GPIO will
wakeup the system:
    - MFP_LPM_WAKEUP_ENABLE
The following macros can be used in platform code, and be OR'ed to
the GPIO configuration to enable its wakeup:
    - WAKEUP_ON_EDGE_{RISE, FALL, BOTH}
    - WAKEUP_ON_LEVEL_HIGH
The WAKEUP_ON_LEVEL_HIGH is used for keypad GPIOs _only_, there is
no edge settings for those GPIOs.
These WAKEUP_ON_* flags OR'ed on wrong GPIOs will be ignored in case
that platform code author is careless enough.
The tradeoff here is that the wakeup source is fully determined by
the platform configuration, instead of enable_irq_wake().
Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
											
										 
											2008-03-05 17:16:29 +08:00
										 |  |  | #ifndef __ASM_ARCH_MFP_PXA2XX_H
 | 
					
						
							|  |  |  | #define __ASM_ARCH_MFP_PXA2XX_H
 | 
					
						
							|  |  |  | 
 | 
					
						
							| 
									
										
										
										
											2009-01-15 16:42:56 +08:00
										 |  |  | #include <plat/mfp.h>
 | 
					
						
							| 
									
										
											  
											
												[ARM] pxa: add MFP-alike pin configuration support for pxa{25x, 27x}
Pin configuration on pxa{25x,27x} has now separated from generic GPIO
into dedicated mfp-pxa2xx.c by this patch. The name "mfp" is borrowed
from pxa3xx and is used here to alert the difference between the two
concepts: pin configuration and generic GPIOs.  A GPIO can be called
a "GPIO" _only_ when the corresponding pin is configured so.
A pin configuration on pxa{25x,27x} is composed of:
    - alternate function selection (or pin mux as commonly called)
    - low power state or sleep state
    - wakeup enabling from low power mode
The following MFP_xxx bit definitions in mfp.h are re-used:
    - MFP_PIN(x)
    - MFP_AFx
    - MFP_LPM_DRIVE_{LOW, HIGH}
    - MFP_LPM_EDGE_*
Selecting alternate function on pxa{25x, 27x} involves configuration
of GPIO direction register GPDRx, so a new bit and MFP_DIR_{IN, OUT}
are introduced. And pin configurations are defined by the following
two macros:
    - MFP_CFG_IN  : for input alternate functions
    - MFP_CFG_OUT : for output alternate functions
Every configuration should provide a low power state if it configured
as output using MFP_CFG_OUT().  As a general guideline, the low power
state should be decided to minimize the overall power dissipation. As
an example, it is better to drive the pin as high level in low power
mode if the GPIO is configured as an active low chip select.
Pins configured as GPIO are defined by MFP_CFG_IN(). This is to avoid
side effects when it is firstly configured as output.  The actual
direction of the GPIO is configured by gpio_direction_{input, output}
Wakeup enabling on pxa{25x, 27x} is actually GPIO based wakeup, thus
the device based enable_irq_wake() mechanism is not applicable here.
E.g.  invoking enable_irq_wake() with a GPIO IRQ as in the following
code to enable OTG wakeup is by no means portable and intuitive, and
it is valid _only_ when GPIO35 is configured as USB_P2_1:
    enable_irq_wake( gpio_to_irq(35) );
To make things worse, not every GPIO is able to wakeup the system.
Only a small number of them can, on either rising or falling edge,
or when level is high (for keypad GPIOs).
Thus, another new bit is introduced to indicate that the GPIO will
wakeup the system:
    - MFP_LPM_WAKEUP_ENABLE
The following macros can be used in platform code, and be OR'ed to
the GPIO configuration to enable its wakeup:
    - WAKEUP_ON_EDGE_{RISE, FALL, BOTH}
    - WAKEUP_ON_LEVEL_HIGH
The WAKEUP_ON_LEVEL_HIGH is used for keypad GPIOs _only_, there is
no edge settings for those GPIOs.
These WAKEUP_ON_* flags OR'ed on wrong GPIOs will be ignored in case
that platform code author is careless enough.
The tradeoff here is that the wakeup source is fully determined by
the platform configuration, instead of enable_irq_wake().
Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
											
										 
											2008-03-05 17:16:29 +08:00
										 |  |  | 
 | 
					
						
							|  |  |  | /*
 | 
					
						
							|  |  |  |  * the following MFP_xxx bit definitions in mfp.h are re-used for pxa2xx: | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  *  MFP_PIN(x) | 
					
						
							|  |  |  |  *  MFP_AFx | 
					
						
							|  |  |  |  *  MFP_LPM_DRIVE_{LOW, HIGH} | 
					
						
							|  |  |  |  *  MFP_LPM_EDGE_x | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * other MFP_x bit definitions will be ignored | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * and adds the below two bits specifically for pxa2xx: | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * bit     23 - Input/Output (PXA2xx specific) | 
					
						
							|  |  |  |  * bit     24 - Wakeup Enable(PXA2xx specific) | 
					
						
							|  |  |  |  */ | 
					
						
							|  |  |  | 
 | 
					
						
							|  |  |  | #define MFP_DIR_IN		(0x0 << 23)
 | 
					
						
							|  |  |  | #define MFP_DIR_OUT		(0x1 << 23)
 | 
					
						
							|  |  |  | #define MFP_DIR_MASK		(0x1 << 23)
 | 
					
						
							|  |  |  | #define MFP_DIR(x)		(((x) >> 23) & 0x1)
 | 
					
						
							|  |  |  | 
 | 
					
						
							| 
									
										
										
										
											2008-03-11 09:46:28 +08:00
										 |  |  | #define MFP_LPM_CAN_WAKEUP	(0x1 << 24)
 | 
					
						
							|  |  |  | #define WAKEUP_ON_EDGE_RISE	(MFP_LPM_CAN_WAKEUP | MFP_LPM_EDGE_RISE)
 | 
					
						
							|  |  |  | #define WAKEUP_ON_EDGE_FALL	(MFP_LPM_CAN_WAKEUP | MFP_LPM_EDGE_FALL)
 | 
					
						
							|  |  |  | #define WAKEUP_ON_EDGE_BOTH	(MFP_LPM_CAN_WAKEUP | MFP_LPM_EDGE_BOTH)
 | 
					
						
							| 
									
										
											  
											
												[ARM] pxa: add MFP-alike pin configuration support for pxa{25x, 27x}
Pin configuration on pxa{25x,27x} has now separated from generic GPIO
into dedicated mfp-pxa2xx.c by this patch. The name "mfp" is borrowed
from pxa3xx and is used here to alert the difference between the two
concepts: pin configuration and generic GPIOs.  A GPIO can be called
a "GPIO" _only_ when the corresponding pin is configured so.
A pin configuration on pxa{25x,27x} is composed of:
    - alternate function selection (or pin mux as commonly called)
    - low power state or sleep state
    - wakeup enabling from low power mode
The following MFP_xxx bit definitions in mfp.h are re-used:
    - MFP_PIN(x)
    - MFP_AFx
    - MFP_LPM_DRIVE_{LOW, HIGH}
    - MFP_LPM_EDGE_*
Selecting alternate function on pxa{25x, 27x} involves configuration
of GPIO direction register GPDRx, so a new bit and MFP_DIR_{IN, OUT}
are introduced. And pin configurations are defined by the following
two macros:
    - MFP_CFG_IN  : for input alternate functions
    - MFP_CFG_OUT : for output alternate functions
Every configuration should provide a low power state if it configured
as output using MFP_CFG_OUT().  As a general guideline, the low power
state should be decided to minimize the overall power dissipation. As
an example, it is better to drive the pin as high level in low power
mode if the GPIO is configured as an active low chip select.
Pins configured as GPIO are defined by MFP_CFG_IN(). This is to avoid
side effects when it is firstly configured as output.  The actual
direction of the GPIO is configured by gpio_direction_{input, output}
Wakeup enabling on pxa{25x, 27x} is actually GPIO based wakeup, thus
the device based enable_irq_wake() mechanism is not applicable here.
E.g.  invoking enable_irq_wake() with a GPIO IRQ as in the following
code to enable OTG wakeup is by no means portable and intuitive, and
it is valid _only_ when GPIO35 is configured as USB_P2_1:
    enable_irq_wake( gpio_to_irq(35) );
To make things worse, not every GPIO is able to wakeup the system.
Only a small number of them can, on either rising or falling edge,
or when level is high (for keypad GPIOs).
Thus, another new bit is introduced to indicate that the GPIO will
wakeup the system:
    - MFP_LPM_WAKEUP_ENABLE
The following macros can be used in platform code, and be OR'ed to
the GPIO configuration to enable its wakeup:
    - WAKEUP_ON_EDGE_{RISE, FALL, BOTH}
    - WAKEUP_ON_LEVEL_HIGH
The WAKEUP_ON_LEVEL_HIGH is used for keypad GPIOs _only_, there is
no edge settings for those GPIOs.
These WAKEUP_ON_* flags OR'ed on wrong GPIOs will be ignored in case
that platform code author is careless enough.
The tradeoff here is that the wakeup source is fully determined by
the platform configuration, instead of enable_irq_wake().
Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
											
										 
											2008-03-05 17:16:29 +08:00
										 |  |  | 
 | 
					
						
							|  |  |  | /* specifically for enabling wakeup on keypad GPIOs */ | 
					
						
							| 
									
										
										
										
											2008-03-11 09:46:28 +08:00
										 |  |  | #define WAKEUP_ON_LEVEL_HIGH	(MFP_LPM_CAN_WAKEUP)
 | 
					
						
							| 
									
										
											  
											
												[ARM] pxa: add MFP-alike pin configuration support for pxa{25x, 27x}
Pin configuration on pxa{25x,27x} has now separated from generic GPIO
into dedicated mfp-pxa2xx.c by this patch. The name "mfp" is borrowed
from pxa3xx and is used here to alert the difference between the two
concepts: pin configuration and generic GPIOs.  A GPIO can be called
a "GPIO" _only_ when the corresponding pin is configured so.
A pin configuration on pxa{25x,27x} is composed of:
    - alternate function selection (or pin mux as commonly called)
    - low power state or sleep state
    - wakeup enabling from low power mode
The following MFP_xxx bit definitions in mfp.h are re-used:
    - MFP_PIN(x)
    - MFP_AFx
    - MFP_LPM_DRIVE_{LOW, HIGH}
    - MFP_LPM_EDGE_*
Selecting alternate function on pxa{25x, 27x} involves configuration
of GPIO direction register GPDRx, so a new bit and MFP_DIR_{IN, OUT}
are introduced. And pin configurations are defined by the following
two macros:
    - MFP_CFG_IN  : for input alternate functions
    - MFP_CFG_OUT : for output alternate functions
Every configuration should provide a low power state if it configured
as output using MFP_CFG_OUT().  As a general guideline, the low power
state should be decided to minimize the overall power dissipation. As
an example, it is better to drive the pin as high level in low power
mode if the GPIO is configured as an active low chip select.
Pins configured as GPIO are defined by MFP_CFG_IN(). This is to avoid
side effects when it is firstly configured as output.  The actual
direction of the GPIO is configured by gpio_direction_{input, output}
Wakeup enabling on pxa{25x, 27x} is actually GPIO based wakeup, thus
the device based enable_irq_wake() mechanism is not applicable here.
E.g.  invoking enable_irq_wake() with a GPIO IRQ as in the following
code to enable OTG wakeup is by no means portable and intuitive, and
it is valid _only_ when GPIO35 is configured as USB_P2_1:
    enable_irq_wake( gpio_to_irq(35) );
To make things worse, not every GPIO is able to wakeup the system.
Only a small number of them can, on either rising or falling edge,
or when level is high (for keypad GPIOs).
Thus, another new bit is introduced to indicate that the GPIO will
wakeup the system:
    - MFP_LPM_WAKEUP_ENABLE
The following macros can be used in platform code, and be OR'ed to
the GPIO configuration to enable its wakeup:
    - WAKEUP_ON_EDGE_{RISE, FALL, BOTH}
    - WAKEUP_ON_LEVEL_HIGH
The WAKEUP_ON_LEVEL_HIGH is used for keypad GPIOs _only_, there is
no edge settings for those GPIOs.
These WAKEUP_ON_* flags OR'ed on wrong GPIOs will be ignored in case
that platform code author is careless enough.
The tradeoff here is that the wakeup source is fully determined by
the platform configuration, instead of enable_irq_wake().
Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
											
										 
											2008-03-05 17:16:29 +08:00
										 |  |  | 
 | 
					
						
							|  |  |  | #define MFP_CFG_IN(pin, af)		\
 | 
					
						
							|  |  |  | 	((MFP_CFG_DEFAULT & ~(MFP_AF_MASK | MFP_DIR_MASK)) |\ | 
					
						
							|  |  |  | 	 (MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_DIR_IN)) | 
					
						
							|  |  |  | 
 | 
					
						
							|  |  |  | /* NOTE:  pins configured as output _must_ provide a low power state,
 | 
					
						
							|  |  |  |  * and this state should help to minimize the power dissipation. | 
					
						
							|  |  |  |  */ | 
					
						
							|  |  |  | #define MFP_CFG_OUT(pin, af, state)	\
 | 
					
						
							|  |  |  | 	((MFP_CFG_DEFAULT & ~(MFP_AF_MASK | MFP_DIR_MASK | MFP_LPM_STATE_MASK)) |\ | 
					
						
							|  |  |  | 	 (MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_DIR_OUT | MFP_LPM_##state)) | 
					
						
							|  |  |  | 
 | 
					
						
							|  |  |  | /* Common configurations for pxa25x and pxa27x
 | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * Note: pins configured as GPIO are always initialized to input | 
					
						
							|  |  |  |  * so not to cause any side effect | 
					
						
							|  |  |  |  */ | 
					
						
							|  |  |  | #define GPIO0_GPIO	MFP_CFG_IN(GPIO0, AF0)
 | 
					
						
							|  |  |  | #define GPIO1_GPIO	MFP_CFG_IN(GPIO1, AF0)
 | 
					
						
							|  |  |  | #define GPIO9_GPIO	MFP_CFG_IN(GPIO9, AF0)
 | 
					
						
							|  |  |  | #define GPIO10_GPIO	MFP_CFG_IN(GPIO10, AF0)
 | 
					
						
							|  |  |  | #define GPIO11_GPIO	MFP_CFG_IN(GPIO11, AF0)
 | 
					
						
							|  |  |  | #define GPIO12_GPIO	MFP_CFG_IN(GPIO12, AF0)
 | 
					
						
							|  |  |  | #define GPIO13_GPIO	MFP_CFG_IN(GPIO13, AF0)
 | 
					
						
							|  |  |  | #define GPIO14_GPIO	MFP_CFG_IN(GPIO14, AF0)
 | 
					
						
							|  |  |  | #define GPIO15_GPIO	MFP_CFG_IN(GPIO15, AF0)
 | 
					
						
							|  |  |  | #define GPIO16_GPIO	MFP_CFG_IN(GPIO16, AF0)
 | 
					
						
							|  |  |  | #define GPIO17_GPIO	MFP_CFG_IN(GPIO17, AF0)
 | 
					
						
							|  |  |  | #define GPIO18_GPIO	MFP_CFG_IN(GPIO18, AF0)
 | 
					
						
							|  |  |  | #define GPIO19_GPIO	MFP_CFG_IN(GPIO19, AF0)
 | 
					
						
							|  |  |  | #define GPIO20_GPIO	MFP_CFG_IN(GPIO20, AF0)
 | 
					
						
							|  |  |  | #define GPIO21_GPIO	MFP_CFG_IN(GPIO21, AF0)
 | 
					
						
							|  |  |  | #define GPIO22_GPIO	MFP_CFG_IN(GPIO22, AF0)
 | 
					
						
							|  |  |  | #define GPIO23_GPIO	MFP_CFG_IN(GPIO23, AF0)
 | 
					
						
							|  |  |  | #define GPIO24_GPIO	MFP_CFG_IN(GPIO24, AF0)
 | 
					
						
							|  |  |  | #define GPIO25_GPIO	MFP_CFG_IN(GPIO25, AF0)
 | 
					
						
							|  |  |  | #define GPIO26_GPIO	MFP_CFG_IN(GPIO26, AF0)
 | 
					
						
							|  |  |  | #define GPIO27_GPIO	MFP_CFG_IN(GPIO27, AF0)
 | 
					
						
							|  |  |  | #define GPIO28_GPIO	MFP_CFG_IN(GPIO28, AF0)
 | 
					
						
							|  |  |  | #define GPIO29_GPIO	MFP_CFG_IN(GPIO29, AF0)
 | 
					
						
							|  |  |  | #define GPIO30_GPIO	MFP_CFG_IN(GPIO30, AF0)
 | 
					
						
							|  |  |  | #define GPIO31_GPIO	MFP_CFG_IN(GPIO31, AF0)
 | 
					
						
							|  |  |  | #define GPIO32_GPIO	MFP_CFG_IN(GPIO32, AF0)
 | 
					
						
							|  |  |  | #define GPIO33_GPIO	MFP_CFG_IN(GPIO33, AF0)
 | 
					
						
							|  |  |  | #define GPIO34_GPIO	MFP_CFG_IN(GPIO34, AF0)
 | 
					
						
							|  |  |  | #define GPIO35_GPIO	MFP_CFG_IN(GPIO35, AF0)
 | 
					
						
							|  |  |  | #define GPIO36_GPIO	MFP_CFG_IN(GPIO36, AF0)
 | 
					
						
							|  |  |  | #define GPIO37_GPIO	MFP_CFG_IN(GPIO37, AF0)
 | 
					
						
							|  |  |  | #define GPIO38_GPIO	MFP_CFG_IN(GPIO38, AF0)
 | 
					
						
							|  |  |  | #define GPIO39_GPIO	MFP_CFG_IN(GPIO39, AF0)
 | 
					
						
							|  |  |  | #define GPIO40_GPIO	MFP_CFG_IN(GPIO40, AF0)
 | 
					
						
							|  |  |  | #define GPIO41_GPIO	MFP_CFG_IN(GPIO41, AF0)
 | 
					
						
							|  |  |  | #define GPIO42_GPIO	MFP_CFG_IN(GPIO42, AF0)
 | 
					
						
							|  |  |  | #define GPIO43_GPIO	MFP_CFG_IN(GPIO43, AF0)
 | 
					
						
							|  |  |  | #define GPIO44_GPIO	MFP_CFG_IN(GPIO44, AF0)
 | 
					
						
							|  |  |  | #define GPIO45_GPIO	MFP_CFG_IN(GPIO45, AF0)
 | 
					
						
							|  |  |  | #define GPIO46_GPIO	MFP_CFG_IN(GPIO46, AF0)
 | 
					
						
							|  |  |  | #define GPIO47_GPIO	MFP_CFG_IN(GPIO47, AF0)
 | 
					
						
							|  |  |  | #define GPIO48_GPIO	MFP_CFG_IN(GPIO48, AF0)
 | 
					
						
							|  |  |  | #define GPIO49_GPIO	MFP_CFG_IN(GPIO49, AF0)
 | 
					
						
							|  |  |  | #define GPIO50_GPIO	MFP_CFG_IN(GPIO50, AF0)
 | 
					
						
							|  |  |  | #define GPIO51_GPIO	MFP_CFG_IN(GPIO51, AF0)
 | 
					
						
							|  |  |  | #define GPIO52_GPIO	MFP_CFG_IN(GPIO52, AF0)
 | 
					
						
							|  |  |  | #define GPIO53_GPIO	MFP_CFG_IN(GPIO53, AF0)
 | 
					
						
							|  |  |  | #define GPIO54_GPIO	MFP_CFG_IN(GPIO54, AF0)
 | 
					
						
							|  |  |  | #define GPIO55_GPIO	MFP_CFG_IN(GPIO55, AF0)
 | 
					
						
							|  |  |  | #define GPIO56_GPIO	MFP_CFG_IN(GPIO56, AF0)
 | 
					
						
							|  |  |  | #define GPIO57_GPIO	MFP_CFG_IN(GPIO57, AF0)
 | 
					
						
							|  |  |  | #define GPIO58_GPIO	MFP_CFG_IN(GPIO58, AF0)
 | 
					
						
							|  |  |  | #define GPIO59_GPIO	MFP_CFG_IN(GPIO59, AF0)
 | 
					
						
							|  |  |  | #define GPIO60_GPIO	MFP_CFG_IN(GPIO60, AF0)
 | 
					
						
							|  |  |  | #define GPIO61_GPIO	MFP_CFG_IN(GPIO61, AF0)
 | 
					
						
							|  |  |  | #define GPIO62_GPIO	MFP_CFG_IN(GPIO62, AF0)
 | 
					
						
							|  |  |  | #define GPIO63_GPIO	MFP_CFG_IN(GPIO63, AF0)
 | 
					
						
							|  |  |  | #define GPIO64_GPIO	MFP_CFG_IN(GPIO64, AF0)
 | 
					
						
							|  |  |  | #define GPIO65_GPIO	MFP_CFG_IN(GPIO65, AF0)
 | 
					
						
							|  |  |  | #define GPIO66_GPIO	MFP_CFG_IN(GPIO66, AF0)
 | 
					
						
							|  |  |  | #define GPIO67_GPIO	MFP_CFG_IN(GPIO67, AF0)
 | 
					
						
							|  |  |  | #define GPIO68_GPIO	MFP_CFG_IN(GPIO68, AF0)
 | 
					
						
							|  |  |  | #define GPIO69_GPIO	MFP_CFG_IN(GPIO69, AF0)
 | 
					
						
							|  |  |  | #define GPIO70_GPIO	MFP_CFG_IN(GPIO70, AF0)
 | 
					
						
							|  |  |  | #define GPIO71_GPIO	MFP_CFG_IN(GPIO71, AF0)
 | 
					
						
							|  |  |  | #define GPIO72_GPIO	MFP_CFG_IN(GPIO72, AF0)
 | 
					
						
							|  |  |  | #define GPIO73_GPIO	MFP_CFG_IN(GPIO73, AF0)
 | 
					
						
							|  |  |  | #define GPIO74_GPIO	MFP_CFG_IN(GPIO74, AF0)
 | 
					
						
							|  |  |  | #define GPIO75_GPIO	MFP_CFG_IN(GPIO75, AF0)
 | 
					
						
							|  |  |  | #define GPIO76_GPIO	MFP_CFG_IN(GPIO76, AF0)
 | 
					
						
							|  |  |  | #define GPIO77_GPIO	MFP_CFG_IN(GPIO77, AF0)
 | 
					
						
							|  |  |  | #define GPIO78_GPIO	MFP_CFG_IN(GPIO78, AF0)
 | 
					
						
							|  |  |  | #define GPIO79_GPIO	MFP_CFG_IN(GPIO79, AF0)
 | 
					
						
							|  |  |  | #define GPIO80_GPIO	MFP_CFG_IN(GPIO80, AF0)
 | 
					
						
							|  |  |  | #define GPIO81_GPIO	MFP_CFG_IN(GPIO81, AF0)
 | 
					
						
							|  |  |  | #define GPIO82_GPIO	MFP_CFG_IN(GPIO82, AF0)
 | 
					
						
							|  |  |  | #define GPIO83_GPIO	MFP_CFG_IN(GPIO83, AF0)
 | 
					
						
							|  |  |  | #define GPIO84_GPIO	MFP_CFG_IN(GPIO84, AF0)
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							|  |  |  | 
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							|  |  |  | extern void pxa2xx_mfp_config(unsigned long *mfp_cfgs, int num); | 
					
						
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											2008-06-16 09:47:47 +08:00
										 |  |  | extern void pxa2xx_mfp_set_lpm(int mfp, unsigned long lpm); | 
					
						
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											2008-03-11 09:46:28 +08:00
										 |  |  | extern int gpio_set_wake(unsigned int gpio, unsigned int on); | 
					
						
							| 
									
										
											  
											
												[ARM] pxa: add MFP-alike pin configuration support for pxa{25x, 27x}
Pin configuration on pxa{25x,27x} has now separated from generic GPIO
into dedicated mfp-pxa2xx.c by this patch. The name "mfp" is borrowed
from pxa3xx and is used here to alert the difference between the two
concepts: pin configuration and generic GPIOs.  A GPIO can be called
a "GPIO" _only_ when the corresponding pin is configured so.
A pin configuration on pxa{25x,27x} is composed of:
    - alternate function selection (or pin mux as commonly called)
    - low power state or sleep state
    - wakeup enabling from low power mode
The following MFP_xxx bit definitions in mfp.h are re-used:
    - MFP_PIN(x)
    - MFP_AFx
    - MFP_LPM_DRIVE_{LOW, HIGH}
    - MFP_LPM_EDGE_*
Selecting alternate function on pxa{25x, 27x} involves configuration
of GPIO direction register GPDRx, so a new bit and MFP_DIR_{IN, OUT}
are introduced. And pin configurations are defined by the following
two macros:
    - MFP_CFG_IN  : for input alternate functions
    - MFP_CFG_OUT : for output alternate functions
Every configuration should provide a low power state if it configured
as output using MFP_CFG_OUT().  As a general guideline, the low power
state should be decided to minimize the overall power dissipation. As
an example, it is better to drive the pin as high level in low power
mode if the GPIO is configured as an active low chip select.
Pins configured as GPIO are defined by MFP_CFG_IN(). This is to avoid
side effects when it is firstly configured as output.  The actual
direction of the GPIO is configured by gpio_direction_{input, output}
Wakeup enabling on pxa{25x, 27x} is actually GPIO based wakeup, thus
the device based enable_irq_wake() mechanism is not applicable here.
E.g.  invoking enable_irq_wake() with a GPIO IRQ as in the following
code to enable OTG wakeup is by no means portable and intuitive, and
it is valid _only_ when GPIO35 is configured as USB_P2_1:
    enable_irq_wake( gpio_to_irq(35) );
To make things worse, not every GPIO is able to wakeup the system.
Only a small number of them can, on either rising or falling edge,
or when level is high (for keypad GPIOs).
Thus, another new bit is introduced to indicate that the GPIO will
wakeup the system:
    - MFP_LPM_WAKEUP_ENABLE
The following macros can be used in platform code, and be OR'ed to
the GPIO configuration to enable its wakeup:
    - WAKEUP_ON_EDGE_{RISE, FALL, BOTH}
    - WAKEUP_ON_LEVEL_HIGH
The WAKEUP_ON_LEVEL_HIGH is used for keypad GPIOs _only_, there is
no edge settings for those GPIOs.
These WAKEUP_ON_* flags OR'ed on wrong GPIOs will be ignored in case
that platform code author is careless enough.
The tradeoff here is that the wakeup source is fully determined by
the platform configuration, instead of enable_irq_wake().
Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
											
										 
											2008-03-05 17:16:29 +08:00
										 |  |  | #endif /* __ASM_ARCH_MFP_PXA2XX_H */
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