[ARM] add Marvell Loki (88RC8480) SoC support
The Marvell Loki (88RC8480) is an ARM SoC based on a Feroceon CPU
core running at between 400 MHz and 1.0 GHz, and features a 64 bit
DDR controller, 512K of internal SRAM, two x4 PCI-Express ports,
two Gigabit Ethernet ports, two 4x SAS/SATA controllers, two UARTs,
two TWSI controllers, and IDMA/XOR engines.
This patch adds support for the Marvell LB88RC8480 Development
Board, enabling the use of the PCIe interfaces, the ethernet
interfaces, the TWSI interfaces and the UARTs.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:45:02 +02:00
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/*
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* arch/arm/mach-loki/lb88rc8480-setup.c
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*
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* Marvell LB88RC8480 Development Board Setup
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/irq.h>
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#include <linux/mtd/physmap.h>
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#include <linux/mtd/nand.h>
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#include <linux/timer.h>
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#include <linux/ata_platform.h>
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#include <linux/mv643xx_eth.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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2008-08-05 16:14:15 +01:00
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#include <mach/loki.h>
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[ARM] add Marvell Loki (88RC8480) SoC support
The Marvell Loki (88RC8480) is an ARM SoC based on a Feroceon CPU
core running at between 400 MHz and 1.0 GHz, and features a 64 bit
DDR controller, 512K of internal SRAM, two x4 PCI-Express ports,
two Gigabit Ethernet ports, two 4x SAS/SATA controllers, two UARTs,
two TWSI controllers, and IDMA/XOR engines.
This patch adds support for the Marvell LB88RC8480 Development
Board, enabling the use of the PCIe interfaces, the ethernet
interfaces, the TWSI interfaces and the UARTs.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:45:02 +02:00
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#include "common.h"
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#define LB88RC8480_FLASH_BOOT_CS_BASE 0xf8000000
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#define LB88RC8480_FLASH_BOOT_CS_SIZE SZ_128M
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#define LB88RC8480_NOR_BOOT_BASE 0xff000000
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#define LB88RC8480_NOR_BOOT_SIZE SZ_16M
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static struct mtd_partition lb88rc8480_boot_flash_parts[] = {
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{
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.name = "kernel",
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.offset = 0,
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.size = SZ_2M,
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}, {
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.name = "root-fs",
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.offset = SZ_2M,
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.size = (SZ_8M + SZ_4M + SZ_1M),
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}, {
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.name = "u-boot",
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.offset = (SZ_8M + SZ_4M + SZ_2M + SZ_1M),
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.size = SZ_1M,
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},
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};
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static struct physmap_flash_data lb88rc8480_boot_flash_data = {
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.parts = lb88rc8480_boot_flash_parts,
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.nr_parts = ARRAY_SIZE(lb88rc8480_boot_flash_parts),
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.width = 1, /* 8 bit bus width */
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};
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static struct resource lb88rc8480_boot_flash_resource = {
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.flags = IORESOURCE_MEM,
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.start = LB88RC8480_NOR_BOOT_BASE,
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.end = LB88RC8480_NOR_BOOT_BASE + LB88RC8480_NOR_BOOT_SIZE - 1,
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};
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static struct platform_device lb88rc8480_boot_flash = {
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.name = "physmap-flash",
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.id = 0,
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.dev = {
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.platform_data = &lb88rc8480_boot_flash_data,
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},
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.num_resources = 1,
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.resource = &lb88rc8480_boot_flash_resource,
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};
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static struct mv643xx_eth_platform_data lb88rc8480_ge0_data = {
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2008-08-26 14:06:47 +02:00
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.phy_addr = MV643XX_ETH_PHY_ADDR(1),
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[ARM] add Marvell Loki (88RC8480) SoC support
The Marvell Loki (88RC8480) is an ARM SoC based on a Feroceon CPU
core running at between 400 MHz and 1.0 GHz, and features a 64 bit
DDR controller, 512K of internal SRAM, two x4 PCI-Express ports,
two Gigabit Ethernet ports, two 4x SAS/SATA controllers, two UARTs,
two TWSI controllers, and IDMA/XOR engines.
This patch adds support for the Marvell LB88RC8480 Development
Board, enabling the use of the PCIe interfaces, the ethernet
interfaces, the TWSI interfaces and the UARTs.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:45:02 +02:00
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.mac_addr = { 0x00, 0x50, 0x43, 0x11, 0x22, 0x33 },
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};
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static void __init lb88rc8480_init(void)
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{
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/*
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* Basic setup. Needs to be called early.
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*/
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loki_init();
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loki_ge0_init(&lb88rc8480_ge0_data);
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loki_sas_init();
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loki_uart0_init();
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loki_uart1_init();
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loki_setup_dev_boot_win(LB88RC8480_FLASH_BOOT_CS_BASE,
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LB88RC8480_FLASH_BOOT_CS_SIZE);
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platform_device_register(&lb88rc8480_boot_flash);
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}
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MACHINE_START(LB88RC8480, "Marvell LB88RC8480 Development Board")
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/* Maintainer: Ke Wei <kewei@marvell.com> */
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.phys_io = LOKI_REGS_PHYS_BASE,
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.io_pg_offst = ((LOKI_REGS_VIRT_BASE) >> 18) & 0xfffc,
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.boot_params = 0x00000100,
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.init_machine = lb88rc8480_init,
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.map_io = loki_map_io,
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.init_irq = loki_init_irq,
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.timer = &loki_timer,
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MACHINE_END
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