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											2007-07-21 17:11:38 +02:00
										 |  |  | /*
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							|  |  |  |  * AMD Geode definitions | 
					
						
							|  |  |  |  * Copyright (C) 2006, Advanced Micro Devices, Inc. | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * This program is free software; you can redistribute it and/or | 
					
						
							|  |  |  |  * modify it under the terms of version 2 of the GNU General Public License | 
					
						
							|  |  |  |  * as published by the Free Software Foundation. | 
					
						
							|  |  |  |  */ | 
					
						
							|  |  |  | 
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							|  |  |  | #ifndef _ASM_GEODE_H_
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							|  |  |  | #define _ASM_GEODE_H_
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							|  |  |  | #include <asm/processor.h>
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							|  |  |  | #include <linux/io.h>
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							|  |  |  | /* Generic southbridge functions */ | 
					
						
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							|  |  |  | #define GEODE_DEV_PMS 0
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							|  |  |  | #define GEODE_DEV_ACPI 1
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							|  |  |  | #define GEODE_DEV_GPIO 2
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							|  |  |  | #define GEODE_DEV_MFGPT 3
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							|  |  |  | extern int geode_get_dev_base(unsigned int dev); | 
					
						
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							|  |  |  | /* Useful macros */ | 
					
						
							|  |  |  | #define geode_pms_base()	geode_get_dev_base(GEODE_DEV_PMS)
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							|  |  |  | #define geode_acpi_base()	geode_get_dev_base(GEODE_DEV_ACPI)
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							|  |  |  | #define geode_gpio_base()	geode_get_dev_base(GEODE_DEV_GPIO)
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							|  |  |  | #define geode_mfgpt_base()	geode_get_dev_base(GEODE_DEV_MFGPT)
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							|  |  |  | /* MSRS */ | 
					
						
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							|  |  |  | #define GX_GLCP_SYS_RSTPLL	0x4C000014
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							|  |  |  | #define MSR_LBAR_SMB		0x5140000B
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							|  |  |  | #define MSR_LBAR_GPIO		0x5140000C
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							|  |  |  | #define MSR_LBAR_MFGPT		0x5140000D
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							|  |  |  | #define MSR_LBAR_ACPI		0x5140000E
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							|  |  |  | #define MSR_LBAR_PMS		0x5140000F
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							| 
									
										
										
										
											2007-10-18 15:26:51 -04:00
										 |  |  | #define MSR_DIVIL_SOFT_RESET	0x51400017
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											2007-07-21 17:11:38 +02:00
										 |  |  | #define MSR_PIC_YSEL_LOW	0x51400020
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							|  |  |  | #define MSR_PIC_YSEL_HIGH	0x51400021
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							|  |  |  | #define MSR_PIC_ZSEL_LOW	0x51400022
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							|  |  |  | #define MSR_PIC_ZSEL_HIGH	0x51400023
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							|  |  |  | #define MFGPT_IRQ_MSR		0x51400028
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							|  |  |  | #define MFGPT_NR_MSR		0x51400029
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							|  |  |  | /* Resource Sizes */ | 
					
						
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							|  |  |  | #define LBAR_GPIO_SIZE		0xFF
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							|  |  |  | #define LBAR_MFGPT_SIZE		0x40
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							|  |  |  | #define LBAR_ACPI_SIZE		0x40
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							|  |  |  | #define LBAR_PMS_SIZE		0x80
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							|  |  |  | /* ACPI registers (PMS block) */ | 
					
						
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							|  |  |  | /*
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							|  |  |  |  * PM1_EN is only valid when VSA is enabled for 16 bit reads. | 
					
						
							|  |  |  |  * When VSA is not enabled, *always* read both PM1_STS and PM1_EN | 
					
						
							|  |  |  |  * with a 32 bit read at offset 0x0 | 
					
						
							|  |  |  |  */ | 
					
						
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							|  |  |  | #define PM1_STS			0x00
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							|  |  |  | #define PM1_EN			0x02
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							|  |  |  | #define PM1_CNT			0x08
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							|  |  |  | #define PM2_CNT			0x0C
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							|  |  |  | #define PM_TMR			0x10
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							|  |  |  | #define PM_GPE0_STS		0x18
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							|  |  |  | #define PM_GPE0_EN		0x1C
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							|  |  |  | /* PMC registers (PMS block) */ | 
					
						
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							|  |  |  | #define PM_SSD			0x00
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							|  |  |  | #define PM_SCXA			0x04
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							|  |  |  | #define PM_SCYA			0x08
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							|  |  |  | #define PM_OUT_SLPCTL		0x0C
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							|  |  |  | #define PM_SCLK			0x10
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							|  |  |  | #define PM_SED			0x1
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							|  |  |  | #define PM_SCXD			0x18
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							|  |  |  | #define PM_SCYD			0x1C
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							|  |  |  | #define PM_IN_SLPCTL		0x20
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							|  |  |  | #define PM_WKD			0x30
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							|  |  |  | #define PM_WKXD			0x34
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							|  |  |  | #define PM_RD			0x38
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							|  |  |  | #define PM_WKXA			0x3C
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							|  |  |  | #define PM_FSD			0x40
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							|  |  |  | #define PM_TSD			0x44
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							|  |  |  | #define PM_PSD			0x48
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							|  |  |  | #define PM_NWKD			0x4C
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							|  |  |  | #define PM_AWKD			0x50
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							|  |  |  | #define PM_SSC			0x54
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							|  |  |  | /* GPIO */ | 
					
						
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							|  |  |  | #define GPIO_OUTPUT_VAL		0x00
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							|  |  |  | #define GPIO_OUTPUT_ENABLE	0x04
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							|  |  |  | #define GPIO_OUTPUT_OPEN_DRAIN	0x08
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							|  |  |  | #define GPIO_OUTPUT_INVERT	0x0C
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							|  |  |  | #define GPIO_OUTPUT_AUX1	0x10
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							|  |  |  | #define GPIO_OUTPUT_AUX2	0x14
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							|  |  |  | #define GPIO_PULL_UP		0x18
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							|  |  |  | #define GPIO_PULL_DOWN		0x1C
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							|  |  |  | #define GPIO_INPUT_ENABLE	0x20
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							|  |  |  | #define GPIO_INPUT_INVERT	0x24
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							|  |  |  | #define GPIO_INPUT_FILTER	0x28
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							|  |  |  | #define GPIO_INPUT_EVENT_COUNT	0x2C
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							|  |  |  | #define GPIO_READ_BACK		0x30
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							|  |  |  | #define GPIO_INPUT_AUX1		0x34
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							|  |  |  | #define GPIO_EVENTS_ENABLE	0x38
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							|  |  |  | #define GPIO_LOCK_ENABLE	0x3C
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							|  |  |  | #define GPIO_POSITIVE_EDGE_EN	0x40
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							|  |  |  | #define GPIO_NEGATIVE_EDGE_EN	0x44
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							|  |  |  | #define GPIO_POSITIVE_EDGE_STS	0x48
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							|  |  |  | #define GPIO_NEGATIVE_EDGE_STS	0x4C
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							|  |  |  | #define GPIO_MAP_X		0xE0
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							|  |  |  | #define GPIO_MAP_Y		0xE4
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							|  |  |  | #define GPIO_MAP_Z		0xE8
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							|  |  |  | #define GPIO_MAP_W		0xEC
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							|  |  |  | extern void geode_gpio_set(unsigned int, unsigned int); | 
					
						
							|  |  |  | extern void geode_gpio_clear(unsigned int, unsigned int); | 
					
						
							|  |  |  | extern int geode_gpio_isset(unsigned int, unsigned int); | 
					
						
							|  |  |  | extern void geode_gpio_setup_event(unsigned int, int, int); | 
					
						
							|  |  |  | extern void geode_gpio_set_irq(unsigned int, unsigned int); | 
					
						
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							|  |  |  | static inline void geode_gpio_event_irq(unsigned int gpio, int pair) | 
					
						
							|  |  |  | { | 
					
						
							|  |  |  | 	geode_gpio_setup_event(gpio, pair, 0); | 
					
						
							|  |  |  | } | 
					
						
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							|  |  |  | static inline void geode_gpio_event_pme(unsigned int gpio, int pair) | 
					
						
							|  |  |  | { | 
					
						
							|  |  |  | 	geode_gpio_setup_event(gpio, pair, 1); | 
					
						
							|  |  |  | } | 
					
						
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							|  |  |  | /* Specific geode tests */ | 
					
						
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							|  |  |  | static inline int is_geode_gx(void) | 
					
						
							|  |  |  | { | 
					
						
							|  |  |  | 	return ((boot_cpu_data.x86_vendor == X86_VENDOR_NSC) && | 
					
						
							|  |  |  | 		(boot_cpu_data.x86 == 5) && | 
					
						
							|  |  |  | 		(boot_cpu_data.x86_model == 5)); | 
					
						
							|  |  |  | } | 
					
						
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							|  |  |  | static inline int is_geode_lx(void) | 
					
						
							|  |  |  | { | 
					
						
							|  |  |  | 	return ((boot_cpu_data.x86_vendor == X86_VENDOR_AMD) && | 
					
						
							|  |  |  | 		(boot_cpu_data.x86 == 5) && | 
					
						
							|  |  |  | 		(boot_cpu_data.x86_model == 10)); | 
					
						
							|  |  |  | } | 
					
						
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							|  |  |  | static inline int is_geode(void) | 
					
						
							|  |  |  | { | 
					
						
							|  |  |  | 	return (is_geode_gx() || is_geode_lx()); | 
					
						
							|  |  |  | } | 
					
						
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											2007-10-12 23:04:06 +02:00
										 |  |  | /* MFGPTs */ | 
					
						
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							|  |  |  | #define MFGPT_MAX_TIMERS	8
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							|  |  |  | #define MFGPT_TIMER_ANY		-1
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							|  |  |  | #define MFGPT_DOMAIN_WORKING	1
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							|  |  |  | #define MFGPT_DOMAIN_STANDBY	2
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							|  |  |  | #define MFGPT_DOMAIN_ANY	(MFGPT_DOMAIN_WORKING | MFGPT_DOMAIN_STANDBY)
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							|  |  |  | #define MFGPT_CMP1		0
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							|  |  |  | #define MFGPT_CMP2		1
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							|  |  |  | #define MFGPT_EVENT_IRQ		0
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							|  |  |  | #define MFGPT_EVENT_NMI		1
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							|  |  |  | #define MFGPT_EVENT_RESET	3
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							|  |  |  | #define MFGPT_REG_CMP1		0
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							|  |  |  | #define MFGPT_REG_CMP2		2
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							|  |  |  | #define MFGPT_REG_COUNTER	4
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							|  |  |  | #define MFGPT_REG_SETUP		6
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							|  |  |  | #define MFGPT_SETUP_CNTEN	(1 << 15)
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							|  |  |  | #define MFGPT_SETUP_CMP2	(1 << 14)
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							|  |  |  | #define MFGPT_SETUP_CMP1	(1 << 13)
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							|  |  |  | #define MFGPT_SETUP_SETUP	(1 << 12)
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							|  |  |  | #define MFGPT_SETUP_STOPEN	(1 << 11)
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							|  |  |  | #define MFGPT_SETUP_EXTEN	(1 << 10)
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							|  |  |  | #define MFGPT_SETUP_REVEN	(1 << 5)
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							|  |  |  | #define MFGPT_SETUP_CLKSEL	(1 << 4)
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							|  |  |  | static inline void geode_mfgpt_write(int timer, u16 reg, u16 value) | 
					
						
							|  |  |  | { | 
					
						
							|  |  |  | 	u32 base = geode_get_dev_base(GEODE_DEV_MFGPT); | 
					
						
							|  |  |  | 	outw(value, base + reg + (timer * 8)); | 
					
						
							|  |  |  | } | 
					
						
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							|  |  |  | static inline u16 geode_mfgpt_read(int timer, u16 reg) | 
					
						
							|  |  |  | { | 
					
						
							|  |  |  | 	u32 base = geode_get_dev_base(GEODE_DEV_MFGPT); | 
					
						
							|  |  |  | 	return inw(base + reg + (timer * 8)); | 
					
						
							|  |  |  | } | 
					
						
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							|  |  |  | extern int __init geode_mfgpt_detect(void); | 
					
						
							|  |  |  | extern int geode_mfgpt_toggle_event(int timer, int cmp, int event, int enable); | 
					
						
							|  |  |  | extern int geode_mfgpt_set_irq(int timer, int cmp, int irq, int enable); | 
					
						
							|  |  |  | extern int geode_mfgpt_alloc_timer(int timer, int domain, struct module *owner); | 
					
						
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							|  |  |  | #define geode_mfgpt_setup_irq(t, c, i) geode_mfgpt_set_irq((t), (c), (i), 1)
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							|  |  |  | #define geode_mfgpt_release_irq(t, c, i) geode_mfgpt_set_irq((t), (c), (i), 0)
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											2007-07-21 17:11:38 +02:00
										 |  |  | #endif
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