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										 |  |  | /*
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							|  |  |  |  * arch/arm/mach-omap1/include/ams-delta-fiq.h | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * Taken from the original Amstrad modifications to fiq.h | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * Copyright (c) 2004 Amstrad Plc | 
					
						
							|  |  |  |  * Copyright (c) 2006 Matt Callow | 
					
						
							|  |  |  |  * Copyright (c) 2010 Janusz Krzysztofik | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * This program is free software; you can redistribute it and/or modify | 
					
						
							|  |  |  |  * it under the terms of the GNU General Public License version 2 as | 
					
						
							|  |  |  |  * published by the Free Software Foundation. | 
					
						
							|  |  |  |  */ | 
					
						
							|  |  |  | #ifndef __AMS_DELTA_FIQ_H
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							|  |  |  | #define __AMS_DELTA_FIQ_H
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							|  |  |  | 
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							|  |  |  | /*
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							|  |  |  |  * Interrupt number used for passing control from FIQ to IRQ. | 
					
						
							|  |  |  |  * IRQ12, described as reserved, has been selected. | 
					
						
							|  |  |  |  */ | 
					
						
							|  |  |  | #define INT_DEFERRED_FIQ	INT_1510_RES12
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							|  |  |  | /*
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							|  |  |  |  * Base address of an interrupt handler that the INT_DEFERRED_FIQ belongs to. | 
					
						
							|  |  |  |  */ | 
					
						
							|  |  |  | #if (INT_DEFERRED_FIQ < IH2_BASE)
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							|  |  |  | #define DEFERRED_FIQ_IH_BASE	OMAP_IH1_BASE
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							|  |  |  | #else
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							|  |  |  | #define DEFERRED_FIQ_IH_BASE	OMAP_IH2_BASE
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							|  |  |  | #endif
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							|  |  |  | /*
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										 |  |  |  * These are the offsets from the beginning of the fiq_buffer. They are put here | 
					
						
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											2010-04-28 01:01:29 +00:00
										 |  |  |  * since the buffer and header need to be accessed by drivers servicing devices | 
					
						
							|  |  |  |  * which generate GPIO interrupts - e.g. keyboard, modem, hook switch. | 
					
						
							|  |  |  |  */ | 
					
						
							|  |  |  | #define FIQ_MASK		 0
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							|  |  |  | #define FIQ_STATE		 1
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							|  |  |  | #define FIQ_KEYS_CNT		 2
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							|  |  |  | #define FIQ_TAIL_OFFSET		 3
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							|  |  |  | #define FIQ_HEAD_OFFSET		 4
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							|  |  |  | #define FIQ_BUF_LEN		 5
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							|  |  |  | #define FIQ_KEY			 6
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							|  |  |  | #define FIQ_MISSED_KEYS		 7
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							|  |  |  | #define FIQ_BUFFER_START	 8
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							|  |  |  | #define FIQ_GPIO_INT_MASK	 9
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							|  |  |  | #define FIQ_KEYS_HICNT		10
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							|  |  |  | #define FIQ_IRQ_PEND		11
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							|  |  |  | #define FIQ_SIR_CODE_L1		12
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							|  |  |  | #define IRQ_SIR_CODE_L2		13
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							|  |  |  | #define FIQ_CNT_INT_00		14
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							|  |  |  | #define FIQ_CNT_INT_KEY		15
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							|  |  |  | #define FIQ_CNT_INT_MDM		16
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							|  |  |  | #define FIQ_CNT_INT_03		17
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							|  |  |  | #define FIQ_CNT_INT_HSW		18
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							|  |  |  | #define FIQ_CNT_INT_05		19
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							|  |  |  | #define FIQ_CNT_INT_06		20
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							|  |  |  | #define FIQ_CNT_INT_07		21
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							|  |  |  | #define FIQ_CNT_INT_08		22
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							|  |  |  | #define FIQ_CNT_INT_09		23
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							|  |  |  | #define FIQ_CNT_INT_10		24
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							|  |  |  | #define FIQ_CNT_INT_11		25
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							|  |  |  | #define FIQ_CNT_INT_12		26
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							|  |  |  | #define FIQ_CNT_INT_13		27
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							|  |  |  | #define FIQ_CNT_INT_14		28
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							|  |  |  | #define FIQ_CNT_INT_15		29
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							|  |  |  | #define FIQ_CIRC_BUFF		30      /*Start of circular buffer */
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										 |  |  | #ifndef __ASSEMBLER__
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							|  |  |  | extern unsigned int fiq_buffer[]; | 
					
						
							|  |  |  | extern unsigned char qwerty_fiqin_start, qwerty_fiqin_end; | 
					
						
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							|  |  |  | extern void __init ams_delta_init_fiq(void); | 
					
						
							|  |  |  | #endif
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										 |  |  | #endif
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