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										 |  |  | #ifndef __ASM_TLB_H
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							|  |  |  | #define __ASM_TLB_H
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							|  |  |  | /*
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							|  |  |  |  * MIPS doesn't need any special per-pte or per-vma handling, except | 
					
						
							|  |  |  |  * we need to flush cache for area to be unmapped. | 
					
						
							|  |  |  |  */ | 
					
						
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										 |  |  | #define tlb_start_vma(tlb, vma)					\
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										 |  |  | 	do {							\ | 
					
						
							|  |  |  | 		if (!tlb->fullmm)				\ | 
					
						
							|  |  |  | 			flush_cache_range(vma, vma->vm_start, vma->vm_end); \ | 
					
						
							|  |  |  | 	}  while (0) | 
					
						
							|  |  |  | #define tlb_end_vma(tlb, vma) do { } while (0)
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							|  |  |  | #define __tlb_remove_tlb_entry(tlb, ptep, address) do { } while (0)
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							|  |  |  | /*
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							|  |  |  |  * .. because we flush the whole mm when it fills up. | 
					
						
							|  |  |  |  */ | 
					
						
							|  |  |  | #define tlb_flush(tlb) flush_tlb_mm((tlb)->mm)
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							|  |  |  | #include <asm-generic/tlb.h>
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							|  |  |  | #endif /* __ASM_TLB_H */
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