2008-01-04 23:31:07 +01:00
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/*
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* O32 interface for the 64 (or N32) ABI.
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*
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* Copyright (C) 2002 Maciej W. Rozycki
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <asm/asm.h>
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#include <asm/regdef.h>
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/* Maximum number of arguments supported. Must be even! */
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#define O32_ARGC 32
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2013-01-22 12:59:30 +01:00
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/* Number of static registers we save. */
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2008-01-04 23:31:07 +01:00
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#define O32_STATC 11
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/* Frame size for static register */
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#define O32_FRAMESZ (SZREG * O32_STATC)
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/* Frame size on new stack */
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#define O32_FRAMESZ_NEW (SZREG + 4 * O32_ARGC)
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.text
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/*
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* O32 function call dispatcher, for interfacing 32-bit ROM routines.
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*
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* The standard 64 (N32) calling sequence is supported, with a0
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* holding a function pointer, a1 a new stack pointer, a2-a7 -- its
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* first six arguments and the stack -- remaining ones (up to O32_ARGC,
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* including a2-a7). Static registers, gp and fp are preserved, v0 holds
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* a result. This code relies on the called o32 function for sp and ra
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* restoration and this dispatcher has to be placed in a KSEGx (or KUSEG)
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* address space. Any pointers passed have to point to addresses within
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* one of these spaces as well.
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*/
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NESTED(call_o32, O32_FRAMESZ, ra)
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REG_SUBU sp,O32_FRAMESZ
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REG_S ra,O32_FRAMESZ-1*SZREG(sp)
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REG_S fp,O32_FRAMESZ-2*SZREG(sp)
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REG_S gp,O32_FRAMESZ-3*SZREG(sp)
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REG_S s7,O32_FRAMESZ-4*SZREG(sp)
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REG_S s6,O32_FRAMESZ-5*SZREG(sp)
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REG_S s5,O32_FRAMESZ-6*SZREG(sp)
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REG_S s4,O32_FRAMESZ-7*SZREG(sp)
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REG_S s3,O32_FRAMESZ-8*SZREG(sp)
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REG_S s2,O32_FRAMESZ-9*SZREG(sp)
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REG_S s1,O32_FRAMESZ-10*SZREG(sp)
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REG_S s0,O32_FRAMESZ-11*SZREG(sp)
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move jp,a0
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REG_SUBU s0,a1,O32_FRAMESZ_NEW
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REG_S sp,O32_FRAMESZ_NEW-1*SZREG(s0)
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sll a0,a2,zero
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sll a1,a3,zero
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sll a2,a4,zero
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sll a3,a5,zero
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sw a6,0x10(s0)
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sw a7,0x14(s0)
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PTR_LA t0,O32_FRAMESZ(sp)
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PTR_LA t1,0x18(s0)
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li t2,O32_ARGC-6
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1:
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lw t3,(t0)
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REG_ADDU t0,SZREG
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sw t3,(t1)
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REG_SUBU t2,1
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REG_ADDU t1,4
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bnez t2,1b
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move sp,s0
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jalr jp
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REG_L sp,O32_FRAMESZ_NEW-1*SZREG(sp)
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REG_L s0,O32_FRAMESZ-11*SZREG(sp)
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REG_L s1,O32_FRAMESZ-10*SZREG(sp)
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REG_L s2,O32_FRAMESZ-9*SZREG(sp)
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REG_L s3,O32_FRAMESZ-8*SZREG(sp)
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REG_L s4,O32_FRAMESZ-7*SZREG(sp)
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REG_L s5,O32_FRAMESZ-6*SZREG(sp)
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REG_L s6,O32_FRAMESZ-5*SZREG(sp)
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REG_L s7,O32_FRAMESZ-4*SZREG(sp)
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REG_L gp,O32_FRAMESZ-3*SZREG(sp)
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REG_L fp,O32_FRAMESZ-2*SZREG(sp)
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REG_L ra,O32_FRAMESZ-1*SZREG(sp)
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REG_ADDU sp,O32_FRAMESZ
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jr ra
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END(call_o32)
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