2011-07-26 03:19:06 -06:00
										 
									 
								 
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								/dts-v1/;
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								/include/ "skeleton.dtsi"
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								/ {
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									model = "ARM Versatile AB";
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									compatible = "arm,versatile-ab";
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									#address-cells = <1>;
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									#size-cells = <1>;
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									interrupt-parent = <&vic>;
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									aliases {
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										serial0 = &uart0;
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										serial1 = &uart1;
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										serial2 = &uart2;
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										i2c0 = &i2c0;
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									};
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									memory {
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										reg = <0x0 0x08000000>;
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									};
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									flash@34000000 {
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										compatible = "arm,versatile-flash";
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										reg = <0x34000000 0x4000000>;
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										bank-width = <4>;
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									};
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									i2c0: i2c@10002000 {
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										#address-cells = <1>;
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										#size-cells = <0>;
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										compatible = "arm,versatile-i2c";
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										reg = <0x10002000 0x1000>;
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										rtc@68 {
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											compatible = "dallas,ds1338";
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											reg = <0x68>;
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										};
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									};
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									net@10010000 {
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										compatible = "smsc,lan91c111";
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										reg = <0x10010000 0x10000>;
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										interrupts = <25>;
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									};
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									lcd@10008000 {
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										compatible = "arm,versatile-lcd";
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										reg = <0x10008000 0x1000>;
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									};
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									amba {
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										compatible = "arm,amba-bus";
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										#address-cells = <1>;
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										#size-cells = <1>;
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										ranges;
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										vic: intc@10140000 {
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											compatible = "arm,versatile-vic";
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											interrupt-controller;
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											#interrupt-cells = <1>;
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											reg = <0x10140000 0x1000>;
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										};
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										sic: intc@10003000 {
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											compatible = "arm,versatile-sic";
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											interrupt-controller;
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											#interrupt-cells = <1>;
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											reg = <0x10003000 0x1000>;
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											interrupt-parent = <&vic>;
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											interrupts = <31>; /* Cascaded to vic */
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										};
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										dma@10130000 {
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											compatible = "arm,pl081", "arm,primecell";
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											reg = <0x10130000 0x1000>;
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											interrupts = <17>;
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										};
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										uart0: uart@101f1000 {
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											compatible = "arm,pl011", "arm,primecell";
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											reg = <0x101f1000 0x1000>;
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											interrupts = <12>;
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										};
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										uart1: uart@101f2000 {
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											compatible = "arm,pl011", "arm,primecell";
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											reg = <0x101f2000 0x1000>;
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											interrupts = <13>;
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										};
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										uart2: uart@101f3000 {
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											compatible = "arm,pl011", "arm,primecell";
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											reg = <0x101f3000 0x1000>;
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											interrupts = <14>;
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										};
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										smc@10100000 {
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											compatible = "arm,primecell";
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											reg = <0x10100000 0x1000>;
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										};
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										mpmc@10110000 {
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											compatible = "arm,primecell";
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											reg = <0x10110000 0x1000>;
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										};
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										display@10120000 {
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											compatible = "arm,pl110", "arm,primecell";
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											reg = <0x10120000 0x1000>;
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											interrupts = <16>;
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										};
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										sctl@101e0000 {
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											compatible = "arm,primecell";
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											reg = <0x101e0000 0x1000>;
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										};
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										watchdog@101e1000 {
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											compatible = "arm,primecell";
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											reg = <0x101e1000 0x1000>;
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											interrupts = <0>;
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										};
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										gpio0: gpio@101e4000 {
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											compatible = "arm,pl061", "arm,primecell";
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											reg = <0x101e4000 0x1000>;
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											gpio-controller;
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											interrupts = <6>;
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											#gpio-cells = <2>;
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											interrupt-controller;
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											#interrupt-cells = <2>;
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										};
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										gpio1: gpio@101e5000 {
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											compatible = "arm,pl061", "arm,primecell";
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											reg = <0x101e5000 0x1000>;
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											interrupts = <7>;
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											gpio-controller;
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											#gpio-cells = <2>;
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											interrupt-controller;
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											#interrupt-cells = <2>;
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										};
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										rtc@101e8000 {
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											compatible = "arm,pl030", "arm,primecell";
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											reg = <0x101e8000 0x1000>;
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											interrupts = <10>;
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										};
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										sci@101f0000 {
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											compatible = "arm,primecell";
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											reg = <0x101f0000 0x1000>;
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											interrupts = <15>;
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										};
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										ssp@101f4000 {
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											compatible = "arm,pl022", "arm,primecell";
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											reg = <0x101f4000 0x1000>;
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											interrupts = <11>;
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										};
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										fpga {
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							 | 
							
								
							 | 
							
								
							 | 
							
							
											compatible = "arm,versatile-fpga", "simple-bus";
							 | 
						
					
						
							| 
								
							 | 
							
								
							 | 
							
								
							 | 
							
							
											#address-cells = <1>;
							 | 
						
					
						
							| 
								
							 | 
							
								
							 | 
							
								
							 | 
							
							
											#size-cells = <1>;
							 | 
						
					
						
							| 
								
							 | 
							
								
							 | 
							
								
							 | 
							
							
											ranges = <0 0x10000000 0x10000>;
							 | 
						
					
						
							| 
								
							 | 
							
								
							 | 
							
								
							 | 
							
							
								
							 | 
						
					
						
							| 
								
							 | 
							
								
							 | 
							
								
							 | 
							
							
											aaci@4000 {
							 | 
						
					
						
							| 
								
							 | 
							
								
							 | 
							
								
							 | 
							
							
												compatible = "arm,primecell";
							 | 
						
					
						
							| 
								
							 | 
							
								
							 | 
							
								
							 | 
							
							
												reg = <0x4000 0x1000>;
							 | 
						
					
						
							| 
								
							 | 
							
								
							 | 
							
								
							 | 
							
							
												interrupts = <24>;
							 | 
						
					
						
							| 
								
							 | 
							
								
							 | 
							
								
							 | 
							
							
											};
							 | 
						
					
						
							| 
								
							 | 
							
								
							 | 
							
								
							 | 
							
							
											mmc@5000 {
							 | 
						
					
						
							| 
								
							 | 
							
								
							 | 
							
								
							 | 
							
							
												compatible = "arm,primecell";
							 | 
						
					
						
							| 
								
							 | 
							
								
							 | 
							
								
							 | 
							
							
												reg = < 0x5000 0x1000>;
							 | 
						
					
						
							
								
									
										
										
										
											2012-04-18 22:26:51 +01:00
										 
									 
								 
							 | 
							
								
									
										
									
								
							 | 
							
								
							 | 
							
							
												interrupts = <22 34>;
							 | 
						
					
						
							
								
									
										
										
										
											2011-07-26 03:19:06 -06:00
										 
									 
								 
							 | 
							
								
							 | 
							
								
							 | 
							
							
											};
							 | 
						
					
						
							| 
								
							 | 
							
								
							 | 
							
								
							 | 
							
							
											kmi@6000 {
							 | 
						
					
						
							| 
								
							 | 
							
								
							 | 
							
								
							 | 
							
							
												compatible = "arm,pl050", "arm,primecell";
							 | 
						
					
						
							| 
								
							 | 
							
								
							 | 
							
								
							 | 
							
							
												reg = <0x6000 0x1000>;
							 | 
						
					
						
							| 
								
							 | 
							
								
							 | 
							
								
							 | 
							
							
												interrupt-parent = <&sic>;
							 | 
						
					
						
							| 
								
							 | 
							
								
							 | 
							
								
							 | 
							
							
												interrupts = <3>;
							 | 
						
					
						
							| 
								
							 | 
							
								
							 | 
							
								
							 | 
							
							
											};
							 | 
						
					
						
							| 
								
							 | 
							
								
							 | 
							
								
							 | 
							
							
											kmi@7000 {
							 | 
						
					
						
							| 
								
							 | 
							
								
							 | 
							
								
							 | 
							
							
												compatible = "arm,pl050", "arm,primecell";
							 | 
						
					
						
							| 
								
							 | 
							
								
							 | 
							
								
							 | 
							
							
												reg = <0x7000 0x1000>;
							 | 
						
					
						
							| 
								
							 | 
							
								
							 | 
							
								
							 | 
							
							
												interrupt-parent = <&sic>;
							 | 
						
					
						
							| 
								
							 | 
							
								
							 | 
							
								
							 | 
							
							
												interrupts = <4>;
							 | 
						
					
						
							| 
								
							 | 
							
								
							 | 
							
								
							 | 
							
							
											};
							 | 
						
					
						
							| 
								
							 | 
							
								
							 | 
							
								
							 | 
							
							
										};
							 | 
						
					
						
							| 
								
							 | 
							
								
							 | 
							
								
							 | 
							
							
									};
							 | 
						
					
						
							| 
								
							 | 
							
								
							 | 
							
								
							 | 
							
							
								};
							 |