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linux-pinenote/tools/perf/tests/insn-x86-dat-src.c

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perf tools: Add a test for decoding of new x86 instructions Add a new test titled: Test x86 instruction decoder - new instructions The purpose of this test is to check the instruction decoder after new instructions have been added. Initially, MPX instructions are tested which are already supported, but the definitions in x86-opcode-map.txt will be tweaked in a subsequent patch, after which this test can be run to verify those changes. The data for the test comes from assembly language instructions in insn-x86-dat-src.c which is converted into bytes by the scripts gen-insn-x86-dat.sh and gen-insn-x86-dat.awk, and included into the test program insn-x86.c as insn-x86-dat-32.c and insn-x86-dat-64.c. The conversion is not done as part of the perf tools build because the test data must be under (git) change control in order for the test to be repeatably-correct. Also it may require a recent version of binutils. Commiter notes: Using it: # perf test decoder 39: Test x86 instruction decoder - new instructions : Ok # perf test -v decoder 39: Test x86 instruction decoder - new instructions : --- start --- test child forked, pid 21970 Decoded ok: 0f 31 rdtsc Decoded ok: f3 0f 1b 00 bndmk (%eax),%bnd0 Decoded ok: f3 0f 1b 05 78 56 34 12 bndmk 0x12345678,%bnd0 Decoded ok: f3 0f 1b 18 bndmk (%eax),%bnd3 <SNIP> Decoded ok: f2 e9 00 00 00 00 bnd jmpq 402 <main+0x402> Decoded ok: f2 e9 00 00 00 00 bnd jmpq 408 <main+0x408> Decoded ok: 67 f2 ff 21 bnd jmpq *(%ecx) Decoded ok: f2 0f 85 00 00 00 00 bnd jne 413 <main+0x413> test child finished with 0 ---- end ---- Test x86 instruction decoder - new instructions: Ok # Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Acked-by: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Andy Lutomirski <luto@amacapital.net> Cc: Dave Hansen <dave.hansen@linux.intel.com> Cc: Denys Vlasenko <dvlasenk@redhat.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Qiaowei Ren <qiaowei.ren@intel.com> Cc: Thomas Gleixner <tglx@linutronix.de> Link: http://lkml.kernel.org/r/1441196131-20632-3-git-send-email-adrian.hunter@intel.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2015-09-02 15:15:26 +03:00
/*
* This file contains instructions for testing by the test titled:
*
* "Test x86 instruction decoder - new instructions"
*
* Note that the 'Expecting' comment lines are consumed by the
* gen-insn-x86-dat.awk script and have the format:
*
* Expecting: <op> <branch> <rel>
*
* If this file is changed, remember to run the gen-insn-x86-dat.sh
* script and commit the result.
*
* Refer to insn-x86.c for more details.
*/
int main(void)
{
/* Following line is a marker for the awk script - do not change */
asm volatile("rdtsc"); /* Start here */
#ifdef __x86_64__
/* bndmk m64, bnd */
asm volatile("bndmk (%rax), %bnd0");
asm volatile("bndmk (%r8), %bnd0");
asm volatile("bndmk (0x12345678), %bnd0");
asm volatile("bndmk (%rax), %bnd3");
asm volatile("bndmk (%rcx,%rax,1), %bnd0");
asm volatile("bndmk 0x12345678(,%rax,1), %bnd0");
asm volatile("bndmk (%rax,%rcx,1), %bnd0");
asm volatile("bndmk (%rax,%rcx,8), %bnd0");
asm volatile("bndmk 0x12(%rax), %bnd0");
asm volatile("bndmk 0x12(%rbp), %bnd0");
asm volatile("bndmk 0x12(%rcx,%rax,1), %bnd0");
asm volatile("bndmk 0x12(%rbp,%rax,1), %bnd0");
asm volatile("bndmk 0x12(%rax,%rcx,1), %bnd0");
asm volatile("bndmk 0x12(%rax,%rcx,8), %bnd0");
asm volatile("bndmk 0x12345678(%rax), %bnd0");
asm volatile("bndmk 0x12345678(%rbp), %bnd0");
asm volatile("bndmk 0x12345678(%rcx,%rax,1), %bnd0");
asm volatile("bndmk 0x12345678(%rbp,%rax,1), %bnd0");
asm volatile("bndmk 0x12345678(%rax,%rcx,1), %bnd0");
asm volatile("bndmk 0x12345678(%rax,%rcx,8), %bnd0");
/* bndcl r/m64, bnd */
asm volatile("bndcl (%rax), %bnd0");
asm volatile("bndcl (%r8), %bnd0");
asm volatile("bndcl (0x12345678), %bnd0");
asm volatile("bndcl (%rax), %bnd3");
asm volatile("bndcl (%rcx,%rax,1), %bnd0");
asm volatile("bndcl 0x12345678(,%rax,1), %bnd0");
asm volatile("bndcl (%rax,%rcx,1), %bnd0");
asm volatile("bndcl (%rax,%rcx,8), %bnd0");
asm volatile("bndcl 0x12(%rax), %bnd0");
asm volatile("bndcl 0x12(%rbp), %bnd0");
asm volatile("bndcl 0x12(%rcx,%rax,1), %bnd0");
asm volatile("bndcl 0x12(%rbp,%rax,1), %bnd0");
asm volatile("bndcl 0x12(%rax,%rcx,1), %bnd0");
asm volatile("bndcl 0x12(%rax,%rcx,8), %bnd0");
asm volatile("bndcl 0x12345678(%rax), %bnd0");
asm volatile("bndcl 0x12345678(%rbp), %bnd0");
asm volatile("bndcl 0x12345678(%rcx,%rax,1), %bnd0");
asm volatile("bndcl 0x12345678(%rbp,%rax,1), %bnd0");
asm volatile("bndcl 0x12345678(%rax,%rcx,1), %bnd0");
asm volatile("bndcl 0x12345678(%rax,%rcx,8), %bnd0");
asm volatile("bndcl %rax, %bnd0");
/* bndcu r/m64, bnd */
asm volatile("bndcu (%rax), %bnd0");
asm volatile("bndcu (%r8), %bnd0");
asm volatile("bndcu (0x12345678), %bnd0");
asm volatile("bndcu (%rax), %bnd3");
asm volatile("bndcu (%rcx,%rax,1), %bnd0");
asm volatile("bndcu 0x12345678(,%rax,1), %bnd0");
asm volatile("bndcu (%rax,%rcx,1), %bnd0");
asm volatile("bndcu (%rax,%rcx,8), %bnd0");
asm volatile("bndcu 0x12(%rax), %bnd0");
asm volatile("bndcu 0x12(%rbp), %bnd0");
asm volatile("bndcu 0x12(%rcx,%rax,1), %bnd0");
asm volatile("bndcu 0x12(%rbp,%rax,1), %bnd0");
asm volatile("bndcu 0x12(%rax,%rcx,1), %bnd0");
asm volatile("bndcu 0x12(%rax,%rcx,8), %bnd0");
asm volatile("bndcu 0x12345678(%rax), %bnd0");
asm volatile("bndcu 0x12345678(%rbp), %bnd0");
asm volatile("bndcu 0x12345678(%rcx,%rax,1), %bnd0");
asm volatile("bndcu 0x12345678(%rbp,%rax,1), %bnd0");
asm volatile("bndcu 0x12345678(%rax,%rcx,1), %bnd0");
asm volatile("bndcu 0x12345678(%rax,%rcx,8), %bnd0");
asm volatile("bndcu %rax, %bnd0");
/* bndcn r/m64, bnd */
asm volatile("bndcn (%rax), %bnd0");
asm volatile("bndcn (%r8), %bnd0");
asm volatile("bndcn (0x12345678), %bnd0");
asm volatile("bndcn (%rax), %bnd3");
asm volatile("bndcn (%rcx,%rax,1), %bnd0");
asm volatile("bndcn 0x12345678(,%rax,1), %bnd0");
asm volatile("bndcn (%rax,%rcx,1), %bnd0");
asm volatile("bndcn (%rax,%rcx,8), %bnd0");
asm volatile("bndcn 0x12(%rax), %bnd0");
asm volatile("bndcn 0x12(%rbp), %bnd0");
asm volatile("bndcn 0x12(%rcx,%rax,1), %bnd0");
asm volatile("bndcn 0x12(%rbp,%rax,1), %bnd0");
asm volatile("bndcn 0x12(%rax,%rcx,1), %bnd0");
asm volatile("bndcn 0x12(%rax,%rcx,8), %bnd0");
asm volatile("bndcn 0x12345678(%rax), %bnd0");
asm volatile("bndcn 0x12345678(%rbp), %bnd0");
asm volatile("bndcn 0x12345678(%rcx,%rax,1), %bnd0");
asm volatile("bndcn 0x12345678(%rbp,%rax,1), %bnd0");
asm volatile("bndcn 0x12345678(%rax,%rcx,1), %bnd0");
asm volatile("bndcn 0x12345678(%rax,%rcx,8), %bnd0");
asm volatile("bndcn %rax, %bnd0");
/* bndmov m128, bnd */
asm volatile("bndmov (%rax), %bnd0");
asm volatile("bndmov (%r8), %bnd0");
asm volatile("bndmov (0x12345678), %bnd0");
asm volatile("bndmov (%rax), %bnd3");
asm volatile("bndmov (%rcx,%rax,1), %bnd0");
asm volatile("bndmov 0x12345678(,%rax,1), %bnd0");
asm volatile("bndmov (%rax,%rcx,1), %bnd0");
asm volatile("bndmov (%rax,%rcx,8), %bnd0");
asm volatile("bndmov 0x12(%rax), %bnd0");
asm volatile("bndmov 0x12(%rbp), %bnd0");
asm volatile("bndmov 0x12(%rcx,%rax,1), %bnd0");
asm volatile("bndmov 0x12(%rbp,%rax,1), %bnd0");
asm volatile("bndmov 0x12(%rax,%rcx,1), %bnd0");
asm volatile("bndmov 0x12(%rax,%rcx,8), %bnd0");
asm volatile("bndmov 0x12345678(%rax), %bnd0");
asm volatile("bndmov 0x12345678(%rbp), %bnd0");
asm volatile("bndmov 0x12345678(%rcx,%rax,1), %bnd0");
asm volatile("bndmov 0x12345678(%rbp,%rax,1), %bnd0");
asm volatile("bndmov 0x12345678(%rax,%rcx,1), %bnd0");
asm volatile("bndmov 0x12345678(%rax,%rcx,8), %bnd0");
/* bndmov bnd, m128 */
asm volatile("bndmov %bnd0, (%rax)");
asm volatile("bndmov %bnd0, (%r8)");
asm volatile("bndmov %bnd0, (0x12345678)");
asm volatile("bndmov %bnd3, (%rax)");
asm volatile("bndmov %bnd0, (%rcx,%rax,1)");
asm volatile("bndmov %bnd0, 0x12345678(,%rax,1)");
asm volatile("bndmov %bnd0, (%rax,%rcx,1)");
asm volatile("bndmov %bnd0, (%rax,%rcx,8)");
asm volatile("bndmov %bnd0, 0x12(%rax)");
asm volatile("bndmov %bnd0, 0x12(%rbp)");
asm volatile("bndmov %bnd0, 0x12(%rcx,%rax,1)");
asm volatile("bndmov %bnd0, 0x12(%rbp,%rax,1)");
asm volatile("bndmov %bnd0, 0x12(%rax,%rcx,1)");
asm volatile("bndmov %bnd0, 0x12(%rax,%rcx,8)");
asm volatile("bndmov %bnd0, 0x12345678(%rax)");
asm volatile("bndmov %bnd0, 0x12345678(%rbp)");
asm volatile("bndmov %bnd0, 0x12345678(%rcx,%rax,1)");
asm volatile("bndmov %bnd0, 0x12345678(%rbp,%rax,1)");
asm volatile("bndmov %bnd0, 0x12345678(%rax,%rcx,1)");
asm volatile("bndmov %bnd0, 0x12345678(%rax,%rcx,8)");
/* bndmov bnd2, bnd1 */
asm volatile("bndmov %bnd0, %bnd1");
asm volatile("bndmov %bnd1, %bnd0");
/* bndldx mib, bnd */
asm volatile("bndldx (%rax), %bnd0");
asm volatile("bndldx (%r8), %bnd0");
asm volatile("bndldx (0x12345678), %bnd0");
asm volatile("bndldx (%rax), %bnd3");
asm volatile("bndldx (%rcx,%rax,1), %bnd0");
asm volatile("bndldx 0x12345678(,%rax,1), %bnd0");
asm volatile("bndldx (%rax,%rcx,1), %bnd0");
asm volatile("bndldx 0x12(%rax), %bnd0");
asm volatile("bndldx 0x12(%rbp), %bnd0");
asm volatile("bndldx 0x12(%rcx,%rax,1), %bnd0");
asm volatile("bndldx 0x12(%rbp,%rax,1), %bnd0");
asm volatile("bndldx 0x12(%rax,%rcx,1), %bnd0");
asm volatile("bndldx 0x12345678(%rax), %bnd0");
asm volatile("bndldx 0x12345678(%rbp), %bnd0");
asm volatile("bndldx 0x12345678(%rcx,%rax,1), %bnd0");
asm volatile("bndldx 0x12345678(%rbp,%rax,1), %bnd0");
asm volatile("bndldx 0x12345678(%rax,%rcx,1), %bnd0");
/* bndstx bnd, mib */
asm volatile("bndstx %bnd0, (%rax)");
asm volatile("bndstx %bnd0, (%r8)");
asm volatile("bndstx %bnd0, (0x12345678)");
asm volatile("bndstx %bnd3, (%rax)");
asm volatile("bndstx %bnd0, (%rcx,%rax,1)");
asm volatile("bndstx %bnd0, 0x12345678(,%rax,1)");
asm volatile("bndstx %bnd0, (%rax,%rcx,1)");
asm volatile("bndstx %bnd0, 0x12(%rax)");
asm volatile("bndstx %bnd0, 0x12(%rbp)");
asm volatile("bndstx %bnd0, 0x12(%rcx,%rax,1)");
asm volatile("bndstx %bnd0, 0x12(%rbp,%rax,1)");
asm volatile("bndstx %bnd0, 0x12(%rax,%rcx,1)");
asm volatile("bndstx %bnd0, 0x12345678(%rax)");
asm volatile("bndstx %bnd0, 0x12345678(%rbp)");
asm volatile("bndstx %bnd0, 0x12345678(%rcx,%rax,1)");
asm volatile("bndstx %bnd0, 0x12345678(%rbp,%rax,1)");
asm volatile("bndstx %bnd0, 0x12345678(%rax,%rcx,1)");
/* bnd prefix on call, ret, jmp and all jcc */
asm volatile("bnd call label1"); /* Expecting: call unconditional 0 */
asm volatile("bnd call *(%eax)"); /* Expecting: call indirect 0 */
asm volatile("bnd ret"); /* Expecting: ret indirect 0 */
asm volatile("bnd jmp label1"); /* Expecting: jmp unconditional 0 */
asm volatile("bnd jmp label1"); /* Expecting: jmp unconditional 0 */
asm volatile("bnd jmp *(%ecx)"); /* Expecting: jmp indirect 0 */
asm volatile("bnd jne label1"); /* Expecting: jcc conditional 0 */
#else /* #ifdef __x86_64__ */
/* bndmk m32, bnd */
asm volatile("bndmk (%eax), %bnd0");
asm volatile("bndmk (0x12345678), %bnd0");
asm volatile("bndmk (%eax), %bnd3");
asm volatile("bndmk (%ecx,%eax,1), %bnd0");
asm volatile("bndmk 0x12345678(,%eax,1), %bnd0");
asm volatile("bndmk (%eax,%ecx,1), %bnd0");
asm volatile("bndmk (%eax,%ecx,8), %bnd0");
asm volatile("bndmk 0x12(%eax), %bnd0");
asm volatile("bndmk 0x12(%ebp), %bnd0");
asm volatile("bndmk 0x12(%ecx,%eax,1), %bnd0");
asm volatile("bndmk 0x12(%ebp,%eax,1), %bnd0");
asm volatile("bndmk 0x12(%eax,%ecx,1), %bnd0");
asm volatile("bndmk 0x12(%eax,%ecx,8), %bnd0");
asm volatile("bndmk 0x12345678(%eax), %bnd0");
asm volatile("bndmk 0x12345678(%ebp), %bnd0");
asm volatile("bndmk 0x12345678(%ecx,%eax,1), %bnd0");
asm volatile("bndmk 0x12345678(%ebp,%eax,1), %bnd0");
asm volatile("bndmk 0x12345678(%eax,%ecx,1), %bnd0");
asm volatile("bndmk 0x12345678(%eax,%ecx,8), %bnd0");
/* bndcl r/m32, bnd */
asm volatile("bndcl (%eax), %bnd0");
asm volatile("bndcl (0x12345678), %bnd0");
asm volatile("bndcl (%eax), %bnd3");
asm volatile("bndcl (%ecx,%eax,1), %bnd0");
asm volatile("bndcl 0x12345678(,%eax,1), %bnd0");
asm volatile("bndcl (%eax,%ecx,1), %bnd0");
asm volatile("bndcl (%eax,%ecx,8), %bnd0");
asm volatile("bndcl 0x12(%eax), %bnd0");
asm volatile("bndcl 0x12(%ebp), %bnd0");
asm volatile("bndcl 0x12(%ecx,%eax,1), %bnd0");
asm volatile("bndcl 0x12(%ebp,%eax,1), %bnd0");
asm volatile("bndcl 0x12(%eax,%ecx,1), %bnd0");
asm volatile("bndcl 0x12(%eax,%ecx,8), %bnd0");
asm volatile("bndcl 0x12345678(%eax), %bnd0");
asm volatile("bndcl 0x12345678(%ebp), %bnd0");
asm volatile("bndcl 0x12345678(%ecx,%eax,1), %bnd0");
asm volatile("bndcl 0x12345678(%ebp,%eax,1), %bnd0");
asm volatile("bndcl 0x12345678(%eax,%ecx,1), %bnd0");
asm volatile("bndcl 0x12345678(%eax,%ecx,8), %bnd0");
asm volatile("bndcl %eax, %bnd0");
/* bndcu r/m32, bnd */
asm volatile("bndcu (%eax), %bnd0");
asm volatile("bndcu (0x12345678), %bnd0");
asm volatile("bndcu (%eax), %bnd3");
asm volatile("bndcu (%ecx,%eax,1), %bnd0");
asm volatile("bndcu 0x12345678(,%eax,1), %bnd0");
asm volatile("bndcu (%eax,%ecx,1), %bnd0");
asm volatile("bndcu (%eax,%ecx,8), %bnd0");
asm volatile("bndcu 0x12(%eax), %bnd0");
asm volatile("bndcu 0x12(%ebp), %bnd0");
asm volatile("bndcu 0x12(%ecx,%eax,1), %bnd0");
asm volatile("bndcu 0x12(%ebp,%eax,1), %bnd0");
asm volatile("bndcu 0x12(%eax,%ecx,1), %bnd0");
asm volatile("bndcu 0x12(%eax,%ecx,8), %bnd0");
asm volatile("bndcu 0x12345678(%eax), %bnd0");
asm volatile("bndcu 0x12345678(%ebp), %bnd0");
asm volatile("bndcu 0x12345678(%ecx,%eax,1), %bnd0");
asm volatile("bndcu 0x12345678(%ebp,%eax,1), %bnd0");
asm volatile("bndcu 0x12345678(%eax,%ecx,1), %bnd0");
asm volatile("bndcu 0x12345678(%eax,%ecx,8), %bnd0");
asm volatile("bndcu %eax, %bnd0");
/* bndcn r/m32, bnd */
asm volatile("bndcn (%eax), %bnd0");
asm volatile("bndcn (0x12345678), %bnd0");
asm volatile("bndcn (%eax), %bnd3");
asm volatile("bndcn (%ecx,%eax,1), %bnd0");
asm volatile("bndcn 0x12345678(,%eax,1), %bnd0");
asm volatile("bndcn (%eax,%ecx,1), %bnd0");
asm volatile("bndcn (%eax,%ecx,8), %bnd0");
asm volatile("bndcn 0x12(%eax), %bnd0");
asm volatile("bndcn 0x12(%ebp), %bnd0");
asm volatile("bndcn 0x12(%ecx,%eax,1), %bnd0");
asm volatile("bndcn 0x12(%ebp,%eax,1), %bnd0");
asm volatile("bndcn 0x12(%eax,%ecx,1), %bnd0");
asm volatile("bndcn 0x12(%eax,%ecx,8), %bnd0");
asm volatile("bndcn 0x12345678(%eax), %bnd0");
asm volatile("bndcn 0x12345678(%ebp), %bnd0");
asm volatile("bndcn 0x12345678(%ecx,%eax,1), %bnd0");
asm volatile("bndcn 0x12345678(%ebp,%eax,1), %bnd0");
asm volatile("bndcn 0x12345678(%eax,%ecx,1), %bnd0");
asm volatile("bndcn 0x12345678(%eax,%ecx,8), %bnd0");
asm volatile("bndcn %eax, %bnd0");
/* bndmov m64, bnd */
asm volatile("bndmov (%eax), %bnd0");
asm volatile("bndmov (0x12345678), %bnd0");
asm volatile("bndmov (%eax), %bnd3");
asm volatile("bndmov (%ecx,%eax,1), %bnd0");
asm volatile("bndmov 0x12345678(,%eax,1), %bnd0");
asm volatile("bndmov (%eax,%ecx,1), %bnd0");
asm volatile("bndmov (%eax,%ecx,8), %bnd0");
asm volatile("bndmov 0x12(%eax), %bnd0");
asm volatile("bndmov 0x12(%ebp), %bnd0");
asm volatile("bndmov 0x12(%ecx,%eax,1), %bnd0");
asm volatile("bndmov 0x12(%ebp,%eax,1), %bnd0");
asm volatile("bndmov 0x12(%eax,%ecx,1), %bnd0");
asm volatile("bndmov 0x12(%eax,%ecx,8), %bnd0");
asm volatile("bndmov 0x12345678(%eax), %bnd0");
asm volatile("bndmov 0x12345678(%ebp), %bnd0");
asm volatile("bndmov 0x12345678(%ecx,%eax,1), %bnd0");
asm volatile("bndmov 0x12345678(%ebp,%eax,1), %bnd0");
asm volatile("bndmov 0x12345678(%eax,%ecx,1), %bnd0");
asm volatile("bndmov 0x12345678(%eax,%ecx,8), %bnd0");
/* bndmov bnd, m64 */
asm volatile("bndmov %bnd0, (%eax)");
asm volatile("bndmov %bnd0, (0x12345678)");
asm volatile("bndmov %bnd3, (%eax)");
asm volatile("bndmov %bnd0, (%ecx,%eax,1)");
asm volatile("bndmov %bnd0, 0x12345678(,%eax,1)");
asm volatile("bndmov %bnd0, (%eax,%ecx,1)");
asm volatile("bndmov %bnd0, (%eax,%ecx,8)");
asm volatile("bndmov %bnd0, 0x12(%eax)");
asm volatile("bndmov %bnd0, 0x12(%ebp)");
asm volatile("bndmov %bnd0, 0x12(%ecx,%eax,1)");
asm volatile("bndmov %bnd0, 0x12(%ebp,%eax,1)");
asm volatile("bndmov %bnd0, 0x12(%eax,%ecx,1)");
asm volatile("bndmov %bnd0, 0x12(%eax,%ecx,8)");
asm volatile("bndmov %bnd0, 0x12345678(%eax)");
asm volatile("bndmov %bnd0, 0x12345678(%ebp)");
asm volatile("bndmov %bnd0, 0x12345678(%ecx,%eax,1)");
asm volatile("bndmov %bnd0, 0x12345678(%ebp,%eax,1)");
asm volatile("bndmov %bnd0, 0x12345678(%eax,%ecx,1)");
asm volatile("bndmov %bnd0, 0x12345678(%eax,%ecx,8)");
/* bndmov bnd2, bnd1 */
asm volatile("bndmov %bnd0, %bnd1");
asm volatile("bndmov %bnd1, %bnd0");
/* bndldx mib, bnd */
asm volatile("bndldx (%eax), %bnd0");
asm volatile("bndldx (0x12345678), %bnd0");
asm volatile("bndldx (%eax), %bnd3");
asm volatile("bndldx (%ecx,%eax,1), %bnd0");
asm volatile("bndldx 0x12345678(,%eax,1), %bnd0");
asm volatile("bndldx (%eax,%ecx,1), %bnd0");
asm volatile("bndldx 0x12(%eax), %bnd0");
asm volatile("bndldx 0x12(%ebp), %bnd0");
asm volatile("bndldx 0x12(%ecx,%eax,1), %bnd0");
asm volatile("bndldx 0x12(%ebp,%eax,1), %bnd0");
asm volatile("bndldx 0x12(%eax,%ecx,1), %bnd0");
asm volatile("bndldx 0x12345678(%eax), %bnd0");
asm volatile("bndldx 0x12345678(%ebp), %bnd0");
asm volatile("bndldx 0x12345678(%ecx,%eax,1), %bnd0");
asm volatile("bndldx 0x12345678(%ebp,%eax,1), %bnd0");
asm volatile("bndldx 0x12345678(%eax,%ecx,1), %bnd0");
/* bndstx bnd, mib */
asm volatile("bndstx %bnd0, (%eax)");
asm volatile("bndstx %bnd0, (0x12345678)");
asm volatile("bndstx %bnd3, (%eax)");
asm volatile("bndstx %bnd0, (%ecx,%eax,1)");
asm volatile("bndstx %bnd0, 0x12345678(,%eax,1)");
asm volatile("bndstx %bnd0, (%eax,%ecx,1)");
asm volatile("bndstx %bnd0, 0x12(%eax)");
asm volatile("bndstx %bnd0, 0x12(%ebp)");
asm volatile("bndstx %bnd0, 0x12(%ecx,%eax,1)");
asm volatile("bndstx %bnd0, 0x12(%ebp,%eax,1)");
asm volatile("bndstx %bnd0, 0x12(%eax,%ecx,1)");
asm volatile("bndstx %bnd0, 0x12345678(%eax)");
asm volatile("bndstx %bnd0, 0x12345678(%ebp)");
asm volatile("bndstx %bnd0, 0x12345678(%ecx,%eax,1)");
asm volatile("bndstx %bnd0, 0x12345678(%ebp,%eax,1)");
asm volatile("bndstx %bnd0, 0x12345678(%eax,%ecx,1)");
/* bnd prefix on call, ret, jmp and all jcc */
asm volatile("bnd call label1"); /* Expecting: call unconditional 0xfffffffc */
asm volatile("bnd call *(%eax)"); /* Expecting: call indirect 0 */
asm volatile("bnd ret"); /* Expecting: ret indirect 0 */
asm volatile("bnd jmp label1"); /* Expecting: jmp unconditional 0xfffffffc */
asm volatile("bnd jmp label1"); /* Expecting: jmp unconditional 0xfffffffc */
asm volatile("bnd jmp *(%ecx)"); /* Expecting: jmp indirect 0 */
asm volatile("bnd jne label1"); /* Expecting: jcc conditional 0xfffffffc */
#endif /* #ifndef __x86_64__ */
/* Following line is a marker for the awk script - do not change */
asm volatile("rdtsc"); /* Stop here */
return 0;
}
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