68 lines
		
	
	
	
		
			1.9 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
		
		
			
		
	
	
			68 lines
		
	
	
	
		
			1.9 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
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								#ifndef __LINUX_MFD_PCF50633_PMIC_H
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								#define __LINUX_MFD_PCF50633_PMIC_H
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								#include <linux/mfd/pcf50633/core.h>
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								#include <linux/platform_device.h>
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								#define PCF50633_REG_AUTOOUT	0x1a
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								#define PCF50633_REG_AUTOENA	0x1b
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								#define PCF50633_REG_AUTOCTL	0x1c
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								#define PCF50633_REG_AUTOMXC	0x1d
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								#define PCF50633_REG_DOWN1OUT	0x1e
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								#define PCF50633_REG_DOWN1ENA	0x1f
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								#define PCF50633_REG_DOWN1CTL	0x20
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								#define PCF50633_REG_DOWN1MXC	0x21
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								#define PCF50633_REG_DOWN2OUT	0x22
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								#define PCF50633_REG_DOWN2ENA	0x23
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								#define PCF50633_REG_DOWN2CTL	0x24
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								#define PCF50633_REG_DOWN2MXC	0x25
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								#define PCF50633_REG_MEMLDOOUT	0x26
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								#define PCF50633_REG_MEMLDOENA	0x27
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								#define PCF50633_REG_LDO1OUT	0x2d
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								#define PCF50633_REG_LDO1ENA	0x2e
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								#define PCF50633_REG_LDO2OUT	0x2f
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								#define PCF50633_REG_LDO2ENA	0x30
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								#define PCF50633_REG_LDO3OUT	0x31
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								#define PCF50633_REG_LDO3ENA	0x32
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								#define PCF50633_REG_LDO4OUT	0x33
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								#define PCF50633_REG_LDO4ENA	0x34
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								#define PCF50633_REG_LDO5OUT	0x35
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								#define PCF50633_REG_LDO5ENA	0x36
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								#define PCF50633_REG_LDO6OUT	0x37
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								#define PCF50633_REG_LDO6ENA	0x38
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								#define PCF50633_REG_HCLDOOUT	0x39
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								#define PCF50633_REG_HCLDOENA	0x3a
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								#define PCF50633_REG_HCLDOOVL	0x40
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								enum pcf50633_regulator_enable {
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									PCF50633_REGULATOR_ON		= 0x01,
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									PCF50633_REGULATOR_ON_GPIO1	= 0x02,
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									PCF50633_REGULATOR_ON_GPIO2	= 0x04,
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									PCF50633_REGULATOR_ON_GPIO3	= 0x08,
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								};
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								#define PCF50633_REGULATOR_ON_MASK	0x0f
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								enum pcf50633_regulator_phase {
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									PCF50633_REGULATOR_ACTPH1	= 0x00,
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									PCF50633_REGULATOR_ACTPH2	= 0x10,
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									PCF50633_REGULATOR_ACTPH3	= 0x20,
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									PCF50633_REGULATOR_ACTPH4	= 0x30,
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								};
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								#define PCF50633_REGULATOR_ACTPH_MASK	0x30
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								enum pcf50633_regulator_id {
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									PCF50633_REGULATOR_AUTO,
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									PCF50633_REGULATOR_DOWN1,
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									PCF50633_REGULATOR_DOWN2,
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									PCF50633_REGULATOR_LDO1,
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									PCF50633_REGULATOR_LDO2,
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									PCF50633_REGULATOR_LDO3,
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									PCF50633_REGULATOR_LDO4,
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									PCF50633_REGULATOR_LDO5,
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									PCF50633_REGULATOR_LDO6,
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									PCF50633_REGULATOR_HCLDO,
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									PCF50633_REGULATOR_MEMLDO,
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								};
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								#endif
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