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										 |  |  | /*
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							|  |  |  |  * linux/arch/sh/boards/se/7780/irq.c | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * Copyright (C) 2006,2007  Nobuhiro Iwamatsu | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * Hitachi UL SolutionEngine 7780 Support. | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * This file is subject to the terms and conditions of the GNU General Public | 
					
						
							|  |  |  |  * License.  See the file "COPYING" in the main directory of this archive | 
					
						
							|  |  |  |  * for more details. | 
					
						
							|  |  |  |  */ | 
					
						
							|  |  |  | #include <linux/init.h>
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							|  |  |  | #include <linux/irq.h>
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							|  |  |  | #include <linux/interrupt.h>
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										 |  |  | #include <linux/io.h>
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										 |  |  | #include <mach-se/mach/se7780.h>
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										 |  |  | #define INTC_BASE	0xffd00000
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							|  |  |  | #define INTC_ICR1	(INTC_BASE+0x1c)
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										 |  |  | /*
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							|  |  |  |  * Initialize IRQ setting | 
					
						
							|  |  |  |  */ | 
					
						
							|  |  |  | void __init init_se7780_IRQ(void) | 
					
						
							|  |  |  | { | 
					
						
							|  |  |  | 	/* enable all interrupt at FPGA */ | 
					
						
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										 |  |  | 	__raw_writew(0, FPGA_INTMSK1); | 
					
						
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										 |  |  | 	/* mask SM501 interrupt */ | 
					
						
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										 |  |  | 	__raw_writew((__raw_readw(FPGA_INTMSK1) | 0x0002), FPGA_INTMSK1); | 
					
						
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										 |  |  | 	/* enable all interrupt at FPGA */ | 
					
						
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										 |  |  | 	__raw_writew(0, FPGA_INTMSK2); | 
					
						
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							|  |  |  | 	/* set FPGA INTSEL register */ | 
					
						
							|  |  |  | 	/* FPGA + 0x06 */ | 
					
						
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										 |  |  | 	__raw_writew( ((IRQPIN_SM501 << IRQPOS_SM501) | | 
					
						
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										 |  |  | 		(IRQPIN_SMC91CX << IRQPOS_SMC91CX)), FPGA_INTSEL1); | 
					
						
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							|  |  |  | 	/* FPGA + 0x08 */ | 
					
						
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										 |  |  | 	__raw_writew(((IRQPIN_EXTINT4 << IRQPOS_EXTINT4) | | 
					
						
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										 |  |  | 		(IRQPIN_EXTINT3 << IRQPOS_EXTINT3) | | 
					
						
							|  |  |  | 		(IRQPIN_EXTINT2 << IRQPOS_EXTINT2) | | 
					
						
							|  |  |  | 		(IRQPIN_EXTINT1 << IRQPOS_EXTINT1)), FPGA_INTSEL2); | 
					
						
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							|  |  |  | 	/* FPGA + 0x0A */ | 
					
						
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										 |  |  | 	__raw_writew((IRQPIN_PCCPW << IRQPOS_PCCPW), FPGA_INTSEL3); | 
					
						
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										 |  |  | 	plat_irq_setup_pins(IRQ_MODE_IRQ); /* install handlers for IRQ0-7 */ | 
					
						
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							|  |  |  | 	/* ICR1: detect low level(for 2ndcut) */ | 
					
						
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										 |  |  | 	__raw_writel(0xAAAA0000, INTC_ICR1); | 
					
						
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							|  |  |  | 	/*
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							|  |  |  | 	 * FPGA PCISEL register initialize | 
					
						
							|  |  |  | 	 * | 
					
						
							|  |  |  | 	 *  CPU  || SLOT1 | SLOT2 | S-ATA | USB | 
					
						
							|  |  |  | 	 *  ------------------------------------- | 
					
						
							|  |  |  | 	 *  INTA || INTA  | INTD  |  --   | INTB | 
					
						
							|  |  |  | 	 *  ------------------------------------- | 
					
						
							|  |  |  | 	 *  INTB || INTB  | INTA  |  --   | INTC | 
					
						
							|  |  |  | 	 *  ------------------------------------- | 
					
						
							|  |  |  | 	 *  INTC || INTC  | INTB  | INTA  |  -- | 
					
						
							|  |  |  | 	 *  ------------------------------------- | 
					
						
							|  |  |  | 	 *  INTD || INTD  | INTC  |  --   | INTA | 
					
						
							|  |  |  | 	 *  ------------------------------------- | 
					
						
							|  |  |  | 	 */ | 
					
						
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										 |  |  | 	__raw_writew(0x0013, FPGA_PCI_INTSEL1); | 
					
						
							|  |  |  | 	__raw_writew(0xE402, FPGA_PCI_INTSEL2); | 
					
						
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										 |  |  | } |