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										 |  |  | /*
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							|  |  |  |  * This file is subject to the terms and conditions of the GNU General Public | 
					
						
							|  |  |  |  * License.  See the file "COPYING" in the main directory of this archive | 
					
						
							|  |  |  |  * for more details. | 
					
						
							|  |  |  |  * | 
					
						
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										 |  |  |  * Copyright (C) 2003, 07 Ralf Baechle | 
					
						
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										 |  |  |  */ | 
					
						
							|  |  |  | #ifndef __ASM_MACH_IP27_CPU_FEATURE_OVERRIDES_H
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							|  |  |  | #define __ASM_MACH_IP27_CPU_FEATURE_OVERRIDES_H
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										 |  |  | #include <asm/cpu.h>
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										 |  |  | /*
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							|  |  |  |  * IP27 only comes with R10000 family processors all using the same config | 
					
						
							|  |  |  |  */ | 
					
						
							|  |  |  | #define cpu_has_watch		1
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							|  |  |  | #define cpu_has_mips16		0
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							|  |  |  | #define cpu_has_divec		0
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							|  |  |  | #define cpu_has_vce		0
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							|  |  |  | #define cpu_has_cache_cdex_p	0
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							|  |  |  | #define cpu_has_cache_cdex_s	0
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							|  |  |  | #define cpu_has_prefetch	1
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							|  |  |  | #define cpu_has_mcheck		0
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							|  |  |  | #define cpu_has_ejtag		0
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							|  |  |  | #define cpu_has_llsc		1
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							|  |  |  | #define cpu_has_vtag_icache	0
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							|  |  |  | #define cpu_has_dc_aliases	0
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							|  |  |  | #define cpu_has_ic_fills_f_dc	0
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										 |  |  | #define cpu_has_dsp		0
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										 |  |  | #define cpu_has_dsp2		0
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										 |  |  | #define cpu_icache_snoops_remote_store	1
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										 |  |  | #define cpu_has_mipsmt		0
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										 |  |  | #define cpu_has_userlocal	0
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							|  |  |  | #define cpu_has_nofpuex		0
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							|  |  |  | #define cpu_has_64bits		1
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										 |  |  | #define cpu_has_4kex		1
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										 |  |  | #define cpu_has_3k_cache	0
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							|  |  |  | #define cpu_has_6k_cache	0
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										 |  |  | #define cpu_has_4k_cache	1
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										 |  |  | #define cpu_has_8k_cache	0
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							|  |  |  | #define cpu_has_tx39_cache	0
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										 |  |  | #define cpu_has_inclusive_pcaches	1
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							|  |  |  | #define cpu_dcache_line_size()	32
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							|  |  |  | #define cpu_icache_line_size()	64
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							|  |  |  | #define cpu_scache_line_size()	128
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										 |  |  | #define cpu_has_mips32r1	0
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							|  |  |  | #define cpu_has_mips32r2	0
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							|  |  |  | #define cpu_has_mips64r1	0
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							|  |  |  | #define cpu_has_mips64r2	0
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										 |  |  | #endif /* __ASM_MACH_IP27_CPU_FEATURE_OVERRIDES_H */
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