52 lines
1.9 KiB
C
52 lines
1.9 KiB
C
|
/*
|
||
|
|
* DRA7xx Clock Management register bits
|
||
|
|
*
|
||
|
|
* Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com
|
||
|
|
*
|
||
|
|
* Generated by code originally written by:
|
||
|
|
* Paul Walmsley (paul@pwsan.com)
|
||
|
|
* Rajendra Nayak (rnayak@ti.com)
|
||
|
|
* Benoit Cousson (b-cousson@ti.com)
|
||
|
|
*
|
||
|
|
* This file is automatically generated from the OMAP hardware databases.
|
||
|
|
* We respectfully ask that any modifications to this file be coordinated
|
||
|
|
* with the public linux-omap@vger.kernel.org mailing list and the
|
||
|
|
* authors above to ensure that the autogeneration scripts are kept
|
||
|
|
* up-to-date with the file contents.
|
||
|
|
*
|
||
|
|
* This program is free software; you can redistribute it and/or modify
|
||
|
|
* it under the terms of the GNU General Public License version 2 as
|
||
|
|
* published by the Free Software Foundation.
|
||
|
|
*/
|
||
|
|
|
||
|
|
#ifndef __ARCH_ARM_MACH_OMAP2_CM_REGBITS_7XX_H
|
||
|
|
#define __ARCH_ARM_MACH_OMAP2_CM_REGBITS_7XX_H
|
||
|
|
|
||
|
|
#define DRA7XX_ATL_STATDEP_SHIFT 30
|
||
|
|
#define DRA7XX_CAM_STATDEP_SHIFT 9
|
||
|
|
#define DRA7XX_DSP1_STATDEP_SHIFT 1
|
||
|
|
#define DRA7XX_DSP2_STATDEP_SHIFT 18
|
||
|
|
#define DRA7XX_DSS_STATDEP_SHIFT 8
|
||
|
|
#define DRA7XX_EMIF_STATDEP_SHIFT 4
|
||
|
|
#define DRA7XX_EVE1_STATDEP_SHIFT 19
|
||
|
|
#define DRA7XX_EVE2_STATDEP_SHIFT 20
|
||
|
|
#define DRA7XX_EVE3_STATDEP_SHIFT 21
|
||
|
|
#define DRA7XX_EVE4_STATDEP_SHIFT 22
|
||
|
|
#define DRA7XX_GMAC_STATDEP_SHIFT 25
|
||
|
|
#define DRA7XX_GPU_STATDEP_SHIFT 10
|
||
|
|
#define DRA7XX_IPU1_STATDEP_SHIFT 23
|
||
|
|
#define DRA7XX_IPU2_STATDEP_SHIFT 0
|
||
|
|
#define DRA7XX_IPU_STATDEP_SHIFT 24
|
||
|
|
#define DRA7XX_IVA_STATDEP_SHIFT 2
|
||
|
|
#define DRA7XX_L3INIT_STATDEP_SHIFT 7
|
||
|
|
#define DRA7XX_L3MAIN1_STATDEP_SHIFT 5
|
||
|
|
#define DRA7XX_L4CFG_STATDEP_SHIFT 12
|
||
|
|
#define DRA7XX_L4PER2_STATDEP_SHIFT 26
|
||
|
|
#define DRA7XX_L4PER3_STATDEP_SHIFT 27
|
||
|
|
#define DRA7XX_L4PER_STATDEP_SHIFT 13
|
||
|
|
#define DRA7XX_L4SEC_STATDEP_SHIFT 14
|
||
|
|
#define DRA7XX_PCIE_STATDEP_SHIFT 29
|
||
|
|
#define DRA7XX_VPE_STATDEP_SHIFT 28
|
||
|
|
#define DRA7XX_WKUPAON_STATDEP_SHIFT 15
|
||
|
|
#endif
|