29 lines
		
	
	
	
		
			767 B
			
		
	
	
	
		
			C
		
	
	
	
	
	
		
		
			
		
	
	
			29 lines
		
	
	
	
		
			767 B
			
		
	
	
	
		
			C
		
	
	
	
	
	
|   | /*
 | ||
|  |  * Copyright (C) 2013 NVIDIA Corporation | ||
|  |  * | ||
|  |  * This program is free software; you can redistribute it and/or modify | ||
|  |  * it under the terms of the GNU General Public License version 2 as | ||
|  |  * published by the Free Software Foundation. | ||
|  |  */ | ||
|  | 
 | ||
|  | #ifndef TEGRA_GR2D_H
 | ||
|  | #define TEGRA_GR2D_H
 | ||
|  | 
 | ||
|  | #define GR2D_UA_BASE_ADDR		0x1a
 | ||
|  | #define GR2D_VA_BASE_ADDR		0x1b
 | ||
|  | #define GR2D_PAT_BASE_ADDR		0x26
 | ||
|  | #define GR2D_DSTA_BASE_ADDR		0x2b
 | ||
|  | #define GR2D_DSTB_BASE_ADDR		0x2c
 | ||
|  | #define GR2D_DSTC_BASE_ADDR		0x2d
 | ||
|  | #define GR2D_SRCA_BASE_ADDR		0x31
 | ||
|  | #define GR2D_SRCB_BASE_ADDR		0x32
 | ||
|  | #define GR2D_SRC_BASE_ADDR_SB		0x48
 | ||
|  | #define GR2D_DSTA_BASE_ADDR_SB		0x49
 | ||
|  | #define GR2D_DSTB_BASE_ADDR_SB		0x4a
 | ||
|  | #define GR2D_UA_BASE_ADDR_SB		0x4b
 | ||
|  | #define GR2D_VA_BASE_ADDR_SB		0x4c
 | ||
|  | 
 | ||
|  | #define GR2D_NUM_REGS			0x4d
 | ||
|  | 
 | ||
|  | #endif
 |