140 lines
3.4 KiB
C
140 lines
3.4 KiB
C
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/*
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* arch/arm/mach-nuc93x/include/mach/map.h
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*
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* Copyright (c) 2008 Nuvoton technology corporation.
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*
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* Wan ZongShun <mcuos.com@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation;version 2 of the License.
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*
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*/
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#ifndef __ASM_ARCH_MAP_H
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#define __ASM_ARCH_MAP_H
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#define MAP_OFFSET (0xfff00000)
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#define CLK_OFFSET (0x10)
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#ifndef __ASSEMBLY__
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#define NUC93X_ADDR(x) ((void __iomem *)(0xF0000000 + ((x)&(~MAP_OFFSET))))
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#else
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#define NUC93X_ADDR(x) (0xF0000000 + ((x)&(~MAP_OFFSET)))
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#endif
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/*
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* nuc932 hardware register definition
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*/
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#define NUC93X_PA_IRQ (0xFFF83000)
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#define NUC93X_PA_GCR (0xFFF00000)
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#define NUC93X_PA_EBI (0xFFF01000)
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#define NUC93X_PA_UART (0xFFF80000)
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#define NUC93X_PA_TIMER (0xFFF81000)
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#define NUC93X_PA_GPIO (0xFFF84000)
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#define NUC93X_PA_GDMA (0xFFF03000)
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#define NUC93X_PA_USBHOST (0xFFF0d000)
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#define NUC93X_PA_I2C (0xFFF89000)
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#define NUC93X_PA_LCD (0xFFF06000)
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#define NUC93X_PA_GE (0xFFF05000)
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#define NUC93X_PA_ADC (0xFFF85000)
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#define NUC93X_PA_RTC (0xFFF87000)
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#define NUC93X_PA_PWM (0xFFF82000)
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#define NUC93X_PA_ACTL (0xFFF0a000)
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#define NUC93X_PA_USBDEV (0xFFF0C000)
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#define NUC93X_PA_JEPEG (0xFFF0e000)
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#define NUC93X_PA_CACHE_T (0xFFF60000)
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#define NUC93X_PA_VRAM (0xFFF0b000)
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#define NUC93X_PA_DMAC (0xFFF09000)
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#define NUC93X_PA_I2SM (0xFFF08000)
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#define NUC93X_PA_CACHE (0xFFF02000)
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#define NUC93X_PA_GPU (0xFFF04000)
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#define NUC93X_PA_VIDEOIN (0xFFF07000)
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#define NUC93X_PA_SPI0 (0xFFF86000)
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#define NUC93X_PA_SPI1 (0xFFF88000)
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/*
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* nuc932 virtual address mapping.
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* interrupt controller is the first thing we put in, to make
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* the assembly code for the irq detection easier
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*/
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#define NUC93X_VA_IRQ NUC93X_ADDR(0x00000000)
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#define NUC93X_SZ_IRQ SZ_4K
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#define NUC93X_VA_GCR NUC93X_ADDR(NUC93X_PA_IRQ)
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#define NUC93X_VA_CLKPWR (NUC93X_VA_GCR+CLK_OFFSET)
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#define NUC93X_SZ_GCR SZ_4K
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/* EBI management */
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#define NUC93X_VA_EBI NUC93X_ADDR(NUC93X_PA_EBI)
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#define NUC93X_SZ_EBI SZ_4K
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/* UARTs */
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#define NUC93X_VA_UART NUC93X_ADDR(NUC93X_PA_UART)
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#define NUC93X_SZ_UART SZ_4K
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/* Timers */
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#define NUC93X_VA_TIMER NUC93X_ADDR(NUC93X_PA_TIMER)
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#define NUC93X_SZ_TIMER SZ_4K
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/* GPIO ports */
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#define NUC93X_VA_GPIO NUC93X_ADDR(NUC93X_PA_GPIO)
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#define NUC93X_SZ_GPIO SZ_4K
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/* GDMA control */
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#define NUC93X_VA_GDMA NUC93X_ADDR(NUC93X_PA_GDMA)
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#define NUC93X_SZ_GDMA SZ_4K
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/* I2C hardware controller */
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#define NUC93X_VA_I2C NUC93X_ADDR(NUC93X_PA_I2C)
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#define NUC93X_SZ_I2C SZ_4K
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/* LCD controller*/
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#define NUC93X_VA_LCD NUC93X_ADDR(NUC93X_PA_LCD)
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#define NUC93X_SZ_LCD SZ_4K
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/* 2D controller*/
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#define NUC93X_VA_GE NUC93X_ADDR(NUC93X_PA_GE)
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#define NUC93X_SZ_GE SZ_4K
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/* ADC */
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#define NUC93X_VA_ADC NUC93X_ADDR(NUC93X_PA_ADC)
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#define NUC93X_SZ_ADC SZ_4K
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/* RTC */
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#define NUC93X_VA_RTC NUC93X_ADDR(NUC93X_PA_RTC)
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#define NUC93X_SZ_RTC SZ_4K
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/* Pulse Width Modulation(PWM) Registers */
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#define NUC93X_VA_PWM NUC93X_ADDR(NUC93X_PA_PWM)
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#define NUC93X_SZ_PWM SZ_4K
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/* Audio Controller controller */
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#define NUC93X_VA_ACTL NUC93X_ADDR(NUC93X_PA_ACTL)
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#define NUC93X_SZ_ACTL SZ_4K
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/* USB Device port */
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#define NUC93X_VA_USBDEV NUC93X_ADDR(NUC93X_PA_USBDEV)
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#define NUC93X_SZ_USBDEV SZ_4K
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/* USB host controller*/
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#define NUC93X_VA_USBHOST NUC93X_ADDR(NUC93X_PA_USBHOST)
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#define NUC93X_SZ_USBHOST SZ_4K
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#endif /* __ASM_ARCH_MAP_H */
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