55 lines
2.1 KiB
Text
55 lines
2.1 KiB
Text
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Pete Popov, ppopov@pacbell.net
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07/11/2001
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This README briefly explains how to use the pci and pci_auto
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code in arch/mips/kernel. The code was ported from PowerPC and
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modified slightly. It has been tested pretty well on PPC on some
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rather complex systems with multiple bridges and devices behind
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each bridge. However, at the time this README was written, the
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mips port was tested only on boards with a single pci bus and
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no P2P bridges. It's very possible that on boards with P2P
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bridges some modifications have to be made. The code will
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evolve, no doubt, but currently every single mips board
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is doing its own pcibios thing and it has become a big
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mess. This generic pci code is meant to clean up the mips
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pci mess and make it easier to add pci support to new boards.
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inside the define for your board in arch/mips/config.in.
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For example, the Galileo EV96100 board looks like this:
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if [ "$CONFIG_MIPS_EV96100" = "y" ]; then
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define_bool CONFIG_PCI y
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define_bool CONFIG_MIPS_GT96100 y
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define_bool CONFIG_NEW_PCI y
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define_bool CONFIG_SWAP_IO_SPACE y
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fi
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Next, if you want to use the arch/mips/kernel/pci code, which has the
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pcibios_init() function, add
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define_bool CONFIG_NEW_PCI y
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inside the define for your board. Again, the EV96100 example above
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show NEW_PCI turned on.
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Now you need to add your files to hook in your pci configuration
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cycles. Usually you'll need only a couple of files named something
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like pci_fixups.c and pci_ops.c. You can copy the templates
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provided and fill in the code.
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The file pci_ops.c should contain the pci configuration cycles routines.
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It also has the mips_pci_channels[] array which contains the descriptors
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of each pci controller.
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The file pci_fixups.c contains a few routines to do interrupt fixups,
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resources fixups, and, if needed, pci bios fixups.
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Usually you'll put your pci_fixups.c file in your board specific directory,
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since the functions in that file are board specific. The functions in
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pci_ops.c, on the other hand, are usually pci controller specific so that
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file could be shared among a few different boards using the same
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pci controller.
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