186 lines
		
	
	
	
		
			4.4 KiB
			
		
	
	
	
		
			Text
		
	
	
	
	
	
		
		
			
		
	
	
			186 lines
		
	
	
	
		
			4.4 KiB
			
		
	
	
	
		
			Text
		
	
	
	
	
	
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								/*
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								 * Device Tree Source for Motorola/Emerson MVME5100.
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								 *
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								 * Copyright 2013 CSC Australia Pty. Ltd.
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								 *
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								 * This file is licensed under the terms of the GNU General Public
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								 * License version 2.  This program is licensed "as is" without
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								 * any warranty of any kind, whether express or implied.
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								 */
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								/dts-v1/;
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								/ {
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									model = "MVME5100";
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									compatible = "MVME5100";
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									#address-cells = <1>;
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									#size-cells = <1>;
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									aliases {
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										serial0 = &serial0;
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										pci0 = &pci0;
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									};
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									cpus {
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										#address-cells = <1>;
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										#size-cells = <0>;
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										PowerPC,7410 {
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											device_type = "cpu";
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											reg = <0x0>;
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											/* Following required by dtc but not used */
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											d-cache-line-size = <32>;
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											i-cache-line-size = <32>;
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											i-cache-size = <32768>;
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											d-cache-size = <32768>;
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											timebase-frequency = <25000000>;
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											clock-frequency = <500000000>;
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											bus-frequency = <100000000>;
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										};
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									};
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									memory {
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										device_type = "memory";
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										reg = <0x0 0x20000000>;
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									};
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									hawk@fef80000 {
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										#address-cells = <1>;
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										#size-cells = <1>;
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										compatible = "hawk-bridge", "simple-bus";
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										ranges = <0x0 0xfef80000 0x10000>;
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										reg = <0xfef80000 0x10000>;
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										serial0: serial@8000 {
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											device_type = "serial";
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											compatible = "ns16550";
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											reg = <0x8000 0x80>;
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											reg-shift = <4>;
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											clock-frequency = <1843200>;
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											current-speed = <9600>;
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											interrupts = <1 1>; // IRQ1 Level Active Low.
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											interrupt-parent = <&mpic>;
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										};
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										serial1: serial@8200 {
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											device_type = "serial";
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											compatible = "ns16550";
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											reg = <0x8200 0x80>;
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											reg-shift = <4>;
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											clock-frequency = <1843200>;
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											current-speed = <9600>;
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											interrupts = <1 1>; // IRQ1 Level Active Low.
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											interrupt-parent = <&mpic>;
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										};
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										mpic: interrupt-controller@f3f80000 {
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											#interrupt-cells = <2>;
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											#address-cells = <0>;
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											device_type = "open-pic";
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											compatible = "chrp,open-pic";
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											interrupt-controller;
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											reg = <0xf3f80000 0x40000>;
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										};
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									};
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									pci0: pci@feff0000 {
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										#address-cells = <3>;
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										#size-cells = <2>;
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										#interrupt-cells = <1>;
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										device_type = "pci";
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										compatible = "hawk-pci";
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										reg = <0xfec00000 0x400000>;
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										8259-interrupt-acknowledge = <0xfeff0030>;
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										ranges = <0x1000000 0x0        0x0 0xfe000000 0x0 0x800000
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											  0x2000000 0x0 0x80000000 0x80000000 0x0 0x74000000>;
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										bus-range = <0 255>;
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										clock-frequency = <33333333>;
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										interrupt-parent = <&mpic>;
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										interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
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										interrupt-map = <
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											/*
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											 * This definition (IDSEL 11) duplicates the
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											 * interrupts definition in the i8259
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											 * interrupt controller below.
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											 *
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											 * Do not change the interrupt sense/polarity from
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											 * 0x2 to anything else, doing so will cause endless
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											 * "spurious" i8259 interrupts to be fielded.
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											 */
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											// IDSEL 11 - iPMC712 PCI/ISA Bridge
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											0x5800 0x0 0x0 0x1 &mpic 0x0 0x2
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											0x5800 0x0 0x0 0x2 &mpic 0x0 0x2
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											0x5800 0x0 0x0 0x3 &mpic 0x0 0x2
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											0x5800 0x0 0x0 0x4 &mpic 0x0 0x2
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											/* IDSEL 12 - Not Used */
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											/* IDSEL 13 - Universe VME Bridge */
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											0x6800 0x0 0x0 0x1 &mpic 0x5 0x1
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											0x6800 0x0 0x0 0x2 &mpic 0x6 0x1
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											0x6800 0x0 0x0 0x3 &mpic 0x7 0x1
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											0x6800 0x0 0x0 0x4 &mpic 0x8 0x1
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											/* IDSEL 14 - ENET 1 */
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											0x7000 0x0 0x0 0x1 &mpic 0x2 0x1
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											/* IDSEL 15 - Not Used */
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											/* IDSEL 16 - PMC Slot 1 */
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											0x8000 0x0 0x0 0x1 &mpic 0x9 0x1
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											0x8000 0x0 0x0 0x2 &mpic 0xa 0x1
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											0x8000 0x0 0x0 0x3 &mpic 0xb 0x1
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											0x8000 0x0 0x0 0x4 &mpic 0xc 0x1
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											/* IDSEL 17 - PMC Slot 2 */
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											0x8800 0x0 0x0 0x1 &mpic 0xc 0x1
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											0x8800 0x0 0x0 0x2 &mpic 0x9 0x1
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											0x8800 0x0 0x0 0x3 &mpic 0xa 0x1
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											0x8800 0x0 0x0 0x4 &mpic 0xb 0x1
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											/* IDSEL 18 - Not Used */
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											/* IDSEL 19 - ENET 2 */
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											0x9800 0x0 0x0 0x1 &mpic 0xd 0x1
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											/* IDSEL 20 - PMCSPAN (PCI-X) */
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											0xa000 0x0 0x0 0x1 &mpic 0x9 0x1
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											0xa000 0x0 0x0 0x2 &mpic 0xa 0x1
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											0xa000 0x0 0x0 0x3 &mpic 0xb 0x1
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											0xa000 0x0 0x0 0x4 &mpic 0xc 0x1
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										>;
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										isa {
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											#address-cells = <2>;
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											#size-cells = <1>;
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											#interrupt-cells = <2>;
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											device_type = "isa";
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											compatible = "isa";
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											ranges = <0x00000001 0 0x01000000 0 0x00000000 0x00001000>;
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											interrupt-parent = <&i8259>;
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											i8259: interrupt-controller@20 {
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												#interrupt-cells = <2>;
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												#address-cells = <0>;
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												interrupts = <0 2>;
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												device_type = "interrupt-controller";
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												compatible = "chrp,iic";
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												interrupt-controller;
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												reg = <1 0x00000020 0x00000002
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								                                       1 0x000000a0 0x00000002
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								                                       1 0x000004d0 0x00000002>;
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												interrupt-parent = <&mpic>;
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											};
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										};
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									};
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									chosen {
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										linux,stdout-path = &serial0;
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								        };
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								};
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