53 lines
1.2 KiB
C
53 lines
1.2 KiB
C
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/*
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* Copyright (C) 2013 Imagination Technologies
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* Author: Paul Burton <paul.burton@imgtec.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/errno.h>
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#include <asm/mips-cm.h>
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#include <asm/mips-cpc.h>
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void __iomem *mips_cpc_base;
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phys_t __weak mips_cpc_phys_base(void)
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{
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u32 cpc_base;
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if (!mips_cm_present())
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return 0;
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if (!(read_gcr_cpc_status() & CM_GCR_CPC_STATUS_EX_MSK))
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return 0;
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/* If the CPC is already enabled, leave it so */
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cpc_base = read_gcr_cpc_base();
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if (cpc_base & CM_GCR_CPC_BASE_CPCEN_MSK)
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return cpc_base & CM_GCR_CPC_BASE_CPCBASE_MSK;
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/* Otherwise, give it the default address & enable it */
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cpc_base = mips_cpc_default_phys_base();
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write_gcr_cpc_base(cpc_base | CM_GCR_CPC_BASE_CPCEN_MSK);
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return cpc_base;
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}
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int mips_cpc_probe(void)
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{
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phys_t addr;
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addr = mips_cpc_phys_base();
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if (!addr)
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return -ENODEV;
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mips_cpc_base = ioremap_nocache(addr, 0x8000);
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if (!mips_cpc_base)
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return -ENXIO;
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return 0;
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}
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