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										 |  |  | /*
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							|  |  |  |  *  Copyright (C) 2008 STMicroelectronics | 
					
						
							|  |  |  |  *  Copyright (C) 2009 ST-Ericsson. | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * This program is free software; you can redistribute it and/or modify | 
					
						
							|  |  |  |  * it under the terms of the GNU General Public License as published by | 
					
						
							|  |  |  |  * the Free Software Foundation; either version 2 of the License, or | 
					
						
							|  |  |  |  * (at your option) any later version. | 
					
						
							|  |  |  |  */ | 
					
						
							|  |  |  | #ifndef ASM_ARCH_IRQS_H
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							|  |  |  | #define ASM_ARCH_IRQS_H
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										 |  |  | #include <mach/irqs-db5500.h>
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							|  |  |  | #include <mach/irqs-db8500.h>
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							|  |  |  | #define IRQ_LOCALTIMER                  29
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							|  |  |  | #define IRQ_LOCALWDOG                   30
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							|  |  |  | /* Shared Peripheral Interrupt (SHPI) */ | 
					
						
							|  |  |  | #define IRQ_SHPI_START			32
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							|  |  |  | /* Interrupt numbers generic for shared peripheral */ | 
					
						
							|  |  |  | #define IRQ_MTU0		(IRQ_SHPI_START + 4)
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							|  |  |  | #define IRQ_SPI2		(IRQ_SHPI_START + 6)
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							|  |  |  | #define IRQ_SPI0		(IRQ_SHPI_START + 8)
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							|  |  |  | #define IRQ_UART0		(IRQ_SHPI_START + 11)
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							|  |  |  | #define IRQ_I2C3		(IRQ_SHPI_START + 12)
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							|  |  |  | #define IRQ_SSP0		(IRQ_SHPI_START + 14)
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							|  |  |  | #define IRQ_MTU1		(IRQ_SHPI_START + 17)
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							|  |  |  | #define IRQ_RTC_RTT		(IRQ_SHPI_START + 18)
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							|  |  |  | #define IRQ_UART1		(IRQ_SHPI_START + 19)
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							|  |  |  | #define IRQ_I2C0		(IRQ_SHPI_START + 21)
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							|  |  |  | #define IRQ_I2C1		(IRQ_SHPI_START + 22)
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							|  |  |  | #define IRQ_USBOTG		(IRQ_SHPI_START + 23)
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							|  |  |  | #define IRQ_DMA			(IRQ_SHPI_START + 25)
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							|  |  |  | #define IRQ_UART2		(IRQ_SHPI_START + 26)
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							|  |  |  | #define IRQ_HSIR_EXCEP		(IRQ_SHPI_START + 29)
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							|  |  |  | #define IRQ_MSP0		(IRQ_SHPI_START + 31)
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							|  |  |  | #define IRQ_HSIR_CH0_OVRRUN	(IRQ_SHPI_START + 32)
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							|  |  |  | #define IRQ_HSIR_CH1_OVRRUN	(IRQ_SHPI_START + 33)
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							|  |  |  | #define IRQ_HSIR_CH2_OVRRUN	(IRQ_SHPI_START + 34)
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							|  |  |  | #define IRQ_HSIR_CH3_OVRRUN	(IRQ_SHPI_START + 35)
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							|  |  |  | #define IRQ_AB4500		(IRQ_SHPI_START + 40)
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							|  |  |  | #define IRQ_DISP		(IRQ_SHPI_START + 48)
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							|  |  |  | #define IRQ_SiPI3		(IRQ_SHPI_START + 49)
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										 |  |  | #define IRQ_I2C4		(IRQ_SHPI_START + 51)
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										 |  |  | #define IRQ_SSP1		(IRQ_SHPI_START + 52)
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							|  |  |  | #define IRQ_I2C2		(IRQ_SHPI_START + 55)
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							|  |  |  | #define IRQ_SDMMC0		(IRQ_SHPI_START + 60)
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							|  |  |  | #define IRQ_MSP1		(IRQ_SHPI_START + 62)
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							|  |  |  | #define IRQ_SPI1		(IRQ_SHPI_START + 96)
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							|  |  |  | #define IRQ_MSP2		(IRQ_SHPI_START + 98)
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							|  |  |  | #define IRQ_SDMMC4		(IRQ_SHPI_START + 99)
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							|  |  |  | #define IRQ_HSIRD0		(IRQ_SHPI_START + 104)
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							|  |  |  | #define IRQ_HSIRD1		(IRQ_SHPI_START + 105)
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							|  |  |  | #define IRQ_HSITD0		(IRQ_SHPI_START + 106)
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							|  |  |  | #define IRQ_HSITD1		(IRQ_SHPI_START + 107)
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							|  |  |  | #define IRQ_GPIO0		(IRQ_SHPI_START + 119)
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							|  |  |  | #define IRQ_GPIO1		(IRQ_SHPI_START + 120)
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							|  |  |  | #define IRQ_GPIO2		(IRQ_SHPI_START + 121)
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							|  |  |  | #define IRQ_GPIO3		(IRQ_SHPI_START + 122)
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							|  |  |  | #define IRQ_GPIO4		(IRQ_SHPI_START + 123)
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							|  |  |  | #define IRQ_GPIO5		(IRQ_SHPI_START + 124)
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							|  |  |  | #define IRQ_GPIO6		(IRQ_SHPI_START + 125)
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							|  |  |  | #define IRQ_GPIO7		(IRQ_SHPI_START + 126)
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							|  |  |  | #define IRQ_GPIO8		(IRQ_SHPI_START + 127)
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							|  |  |  | /* There are 128 shared peripheral interrupts assigned to
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							|  |  |  |  * INTID[160:32]. The first 32 interrupts are reserved. | 
					
						
							|  |  |  |  */ | 
					
						
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										 |  |  | #define DBX500_NR_INTERNAL_IRQS		161
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							|  |  |  | /* After chip-specific IRQ numbers we have the GPIO ones */ | 
					
						
							|  |  |  | #define NOMADIK_NR_GPIO			288
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										 |  |  | #define NOMADIK_GPIO_TO_IRQ(gpio)	((gpio) + DBX500_NR_INTERNAL_IRQS)
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							|  |  |  | #define NOMADIK_IRQ_TO_GPIO(irq)	((irq) - DBX500_NR_INTERNAL_IRQS)
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							|  |  |  | #define IRQ_BOARD_START			NOMADIK_GPIO_TO_IRQ(NOMADIK_NR_GPIO)
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										 |  |  | /* This will be overridden by board-specific irq headers */ | 
					
						
							|  |  |  | #define IRQ_BOARD_END			IRQ_BOARD_START
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										 |  |  | #ifdef CONFIG_MACH_U8500_MOP
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							|  |  |  | #include <mach/irqs-board-mop500.h>
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							|  |  |  | #endif
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										 |  |  | #define NR_IRQS				IRQ_BOARD_END
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							|  |  |  | #endif /* ASM_ARCH_IRQS_H */
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