111 lines
		
	
	
	
		
			3.2 KiB
			
		
	
	
	
		
			ArmAsm
		
	
	
	
	
	
		
		
			
		
	
	
			111 lines
		
	
	
	
		
			3.2 KiB
			
		
	
	
	
		
			ArmAsm
		
	
	
	
	
	
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								/* libgcc1 routines for 68000 w/o floating-point hardware.
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								   Copyright (C) 1994, 1996, 1997, 1998 Free Software Foundation, Inc.
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								This file is part of GNU CC.
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								GNU CC is free software; you can redistribute it and/or modify it
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								under the terms of the GNU General Public License as published by the
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								Free Software Foundation; either version 2, or (at your option) any
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								later version.
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								In addition to the permissions in the GNU General Public License, the
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								Free Software Foundation gives you unlimited permission to link the
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								compiled version of this file with other programs, and to distribute
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								those programs without any restriction coming from the use of this
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								file.  (The General Public License restrictions do apply in other
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								respects; for example, they cover modification of the file, and
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								distribution when not linked into another program.)
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								This file is distributed in the hope that it will be useful, but
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								WITHOUT ANY WARRANTY; without even the implied warranty of
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								MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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								General Public License for more details.
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								You should have received a copy of the GNU General Public License
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								along with this program; see the file COPYING.  If not, write to
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								the Free Software Foundation, 59 Temple Place - Suite 330,
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								Boston, MA 02111-1307, USA.  */
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								/* As a special exception, if you link this library with files
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								   compiled with GCC to produce an executable, this does not cause
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								   the resulting executable to be covered by the GNU General Public License.
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								   This exception does not however invalidate any other reasons why
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								   the executable file might be covered by the GNU General Public License.  */
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								/* Use this one for any 680x0; assumes no floating point hardware.
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								   The trailing " '" appearing on some lines is for ANSI preprocessors.  Yuk.
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								   Some of this code comes from MINIX, via the folks at ericsson.
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								   D. V. Henkel-Wallace (gumby@cygnus.com) Fete Bastille, 1992
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								*/
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								/* These are predefined by new versions of GNU cpp.  */
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								#ifndef __USER_LABEL_PREFIX__
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								#define __USER_LABEL_PREFIX__ _
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								#endif
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								#ifndef __REGISTER_PREFIX__
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								#define __REGISTER_PREFIX__
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								#endif
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								#ifndef __IMMEDIATE_PREFIX__
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								#define __IMMEDIATE_PREFIX__ #
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								#endif
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								/* ANSI concatenation macros.  */
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								#define CONCAT1(a, b) CONCAT2(a, b)
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								#define CONCAT2(a, b) a ## b
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								/* Use the right prefix for global labels.  */
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								#define SYM(x) CONCAT1 (__USER_LABEL_PREFIX__, x)
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								/* Use the right prefix for registers.  */
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								#define REG(x) CONCAT1 (__REGISTER_PREFIX__, x)
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								/* Use the right prefix for immediate values.  */
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								#define IMM(x) CONCAT1 (__IMMEDIATE_PREFIX__, x)
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								#define d0 REG (d0)
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								#define d1 REG (d1)
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								#define d2 REG (d2)
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								#define d3 REG (d3)
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								#define d4 REG (d4)
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								#define d5 REG (d5)
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								#define d6 REG (d6)
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								#define d7 REG (d7)
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								#define a0 REG (a0)
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								#define a1 REG (a1)
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								#define a2 REG (a2)
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								#define a3 REG (a3)
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								#define a4 REG (a4)
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								#define a5 REG (a5)
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								#define a6 REG (a6)
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								#define fp REG (fp)
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								#define sp REG (sp)
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									.text
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									.proc
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									.globl	SYM (__mulsi3)
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								SYM (__mulsi3):
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									movew	sp@(4), d0	/* x0 -> d0 */
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									muluw	sp@(10), d0	/* x0*y1 */
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									movew	sp@(6), d1	/* x1 -> d1 */
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									muluw	sp@(8), d1	/* x1*y0 */
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								#if !(defined(__mcf5200__) || defined(__mcoldfire__))
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									addw	d1, d0
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								#else
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									addl	d1, d0
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								#endif
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									swap	d0
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									clrw	d0
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									movew	sp@(6), d1	/* x1 -> d1 */
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									muluw	sp@(10), d1	/* x1*y1 */
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									addl	d1, d0
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									rts
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