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								/******************************************************************************
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								 *
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								 * Copyright(c) 2009-2014  Realtek Corporation.
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								 *
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								 * This program is free software; you can redistribute it and/or modify it
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								 * under the terms of version 2 of the GNU General Public License as
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								 * published by the Free Software Foundation.
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								 *
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								 * This program is distributed in the hope that it will be useful, but WITHOUT
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								 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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								 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
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								 * more details.
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								 *
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								 * The full GNU General Public License is included in this distribution in the
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								 * file called LICENSE.
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								 *
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								 * Contact Information:
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								 * wlanfae <wlanfae@realtek.com>
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								 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
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								 * Hsinchu 300, Taiwan.
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								 *
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								 * Larry Finger <Larry.Finger@lwfinger.net>
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								 *
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								 *****************************************************************************/
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								#ifndef __RTL8723BE_PHY_H__
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								#define __RTL8723BE_PHY_H__
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								/* MAX_TX_COUNT must always set to 4, otherwise read efuse table sequence
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								 * will be wrong.
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								 */
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								#define MAX_TX_COUNT		4
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								#define	TX_1S			0
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								#define	TX_2S			1
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								#define	TX_3S			2
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								#define	TX_4S			3
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								#define	MAX_POWER_INDEX		0x3F
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								#define MAX_PRECMD_CNT			16
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								#define MAX_RFDEPENDCMD_CNT		16
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								#define MAX_POSTCMD_CNT			16
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								#define MAX_DOZE_WAITING_TIMES_9x	64
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								#define RT_CANNOT_IO(hw)		false
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								#define HIGHPOWER_RADIOA_ARRAYLEN	22
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								#define TARGET_CHNL_NUM_2G_5G		59
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								#define IQK_ADDA_REG_NUM		16
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								#define IQK_BB_REG_NUM			9
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								#define MAX_TOLERANCE			5
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								#define	IQK_DELAY_TIME			10
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								#define	index_mapping_NUM		15
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								#define	APK_BB_REG_NUM			5
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								#define	APK_AFE_REG_NUM			16
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								#define	APK_CURVE_REG_NUM		4
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								#define	PATH_NUM			1
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								#define LOOP_LIMIT			5
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								#define MAX_STALL_TIME			50
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								#define ANTENNADIVERSITYVALUE		0x80
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								#define MAX_TXPWR_IDX_NMODE_92S		63
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								#define RESET_CNT_LIMIT			3
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								#define IQK_ADDA_REG_NUM		16
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								#define IQK_MAC_REG_NUM			4
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								#define RF6052_MAX_PATH			2
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								#define CT_OFFSET_MAC_ADDR		0X16
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								#define CT_OFFSET_CCK_TX_PWR_IDX		0x5A
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								#define CT_OFFSET_HT401S_TX_PWR_IDX		0x60
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								#define CT_OFFSET_HT402S_TX_PWR_IDX_DIFF	0x66
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								#define CT_OFFSET_HT20_TX_PWR_IDX_DIFF		0x69
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								#define CT_OFFSET_OFDM_TX_PWR_IDX_DIFF		0x6C
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								#define CT_OFFSET_HT40_MAX_PWR_OFFSET		0x6F
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								#define CT_OFFSET_HT20_MAX_PWR_OFFSET		0x72
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								#define CT_OFFSET_CHANNEL_PLAH			0x75
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								#define CT_OFFSET_THERMAL_METER			0x78
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								#define CT_OFFSET_RF_OPTION			0x79
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								#define CT_OFFSET_VERSION			0x7E
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								#define CT_OFFSET_CUSTOMER_ID			0x7F
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								#define RTL92C_MAX_PATH_NUM			2
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								enum baseband_config_type {
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									BASEBAND_CONFIG_PHY_REG = 0,
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									BASEBAND_CONFIG_AGC_TAB = 1,
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								};
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								enum ant_div_type {
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									NO_ANTDIV		= 0xFF,
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									CG_TRX_HW_ANTDIV	= 0x01,
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									CGCS_RX_HW_ANTDIV	= 0x02,
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									FIXED_HW_ANTDIV         = 0x03,
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									CG_TRX_SMART_ANTDIV	= 0x04,
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									CGCS_RX_SW_ANTDIV	= 0x05,
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								};
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								u32 rtl8723be_phy_query_rf_reg(struct ieee80211_hw *hw,
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											       enum radio_path rfpath,
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											       u32 regaddr, u32 bitmask);
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								void rtl8723be_phy_set_rf_reg(struct ieee80211_hw *hw,
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											      enum radio_path rfpath,
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											      u32 regaddr, u32 bitmask, u32 data);
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								bool rtl8723be_phy_mac_config(struct ieee80211_hw *hw);
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								bool rtl8723be_phy_bb_config(struct ieee80211_hw *hw);
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								bool rtl8723be_phy_rf_config(struct ieee80211_hw *hw);
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								void rtl8723be_phy_get_hw_reg_originalvalue(struct ieee80211_hw *hw);
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								void rtl8723be_phy_get_txpower_level(struct ieee80211_hw *hw,
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												     long *powerlevel);
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								void rtl8723be_phy_set_txpower_level(struct ieee80211_hw *hw,
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												     u8 channel);
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								void rtl8723be_phy_scan_operation_backup(struct ieee80211_hw *hw,
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													 u8 operation);
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								void rtl8723be_phy_set_bw_mode_callback(struct ieee80211_hw *hw);
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								void rtl8723be_phy_set_bw_mode(struct ieee80211_hw *hw,
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											       enum nl80211_channel_type ch_type);
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								void rtl8723be_phy_sw_chnl_callback(struct ieee80211_hw *hw);
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								u8 rtl8723be_phy_sw_chnl(struct ieee80211_hw *hw);
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								void rtl8723be_phy_iq_calibrate(struct ieee80211_hw *hw,
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												bool b_recovery);
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								void rtl8723be_phy_lc_calibrate(struct ieee80211_hw *hw);
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								void rtl8723be_phy_set_rfpath_switch(struct ieee80211_hw *hw, bool bmain);
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								bool rtl8723be_phy_config_rf_with_headerfile(struct ieee80211_hw *hw,
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													     enum radio_path rfpath);
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								bool rtl8723be_phy_set_io_cmd(struct ieee80211_hw *hw, enum io_type iotype);
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								bool rtl8723be_phy_set_rf_power_state(struct ieee80211_hw *hw,
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												      enum rf_pwrstate rfpwr_state);
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								#endif
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