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										 |  |  | /*
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										 |  |  |  * arch/arm/plat-omap/include/mach/sram.h | 
					
						
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										 |  |  |  * | 
					
						
							|  |  |  |  * Interface for functions that need to be run in internal SRAM | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * This program is free software; you can redistribute it and/or modify | 
					
						
							|  |  |  |  * it under the terms of the GNU General Public License version 2 as | 
					
						
							|  |  |  |  * published by the Free Software Foundation. | 
					
						
							|  |  |  |  */ | 
					
						
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							|  |  |  | #ifndef __ARCH_ARM_OMAP_SRAM_H
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							|  |  |  | #define __ARCH_ARM_OMAP_SRAM_H
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										 |  |  | extern int __init omap_sram_init(void); | 
					
						
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										 |  |  | extern void * omap_sram_push(void * start, unsigned long size); | 
					
						
							|  |  |  | extern void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl); | 
					
						
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							|  |  |  | extern void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl, | 
					
						
							|  |  |  | 				u32 base_cs, u32 force_unlock); | 
					
						
							|  |  |  | extern void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, | 
					
						
							|  |  |  | 				      u32 mem_type); | 
					
						
							|  |  |  | extern u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass); | 
					
						
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										 |  |  | extern u32 omap3_configure_core_dpll( | 
					
						
							|  |  |  | 			u32 m2, u32 unlock_dll, u32 f, u32 inc, | 
					
						
							|  |  |  | 			u32 sdrc_rfr_ctrl_0, u32 sdrc_actim_ctrl_a_0, | 
					
						
							|  |  |  | 			u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0, | 
					
						
							|  |  |  | 			u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1, | 
					
						
							|  |  |  | 			u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1); | 
					
						
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										 |  |  | extern void omap3_sram_restore_context(void); | 
					
						
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										 |  |  | /* Do not use these */ | 
					
						
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										 |  |  | extern void omap1_sram_reprogram_clock(u32 ckctl, u32 dpllctl); | 
					
						
							|  |  |  | extern unsigned long omap1_sram_reprogram_clock_sz; | 
					
						
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										 |  |  | extern void omap24xx_sram_reprogram_clock(u32 ckctl, u32 dpllctl); | 
					
						
							|  |  |  | extern unsigned long omap24xx_sram_reprogram_clock_sz; | 
					
						
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										 |  |  | extern void omap242x_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl, | 
					
						
							|  |  |  | 						u32 base_cs, u32 force_unlock); | 
					
						
							|  |  |  | extern unsigned long omap242x_sram_ddr_init_sz; | 
					
						
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										 |  |  | extern u32 omap242x_sram_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, | 
					
						
							|  |  |  | 						int bypass); | 
					
						
							|  |  |  | extern unsigned long omap242x_sram_set_prcm_sz; | 
					
						
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							|  |  |  | extern void omap242x_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, | 
					
						
							|  |  |  | 						u32 mem_type); | 
					
						
							|  |  |  | extern unsigned long omap242x_sram_reprogram_sdrc_sz; | 
					
						
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							|  |  |  | extern void omap243x_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl, | 
					
						
							|  |  |  | 						u32 base_cs, u32 force_unlock); | 
					
						
							|  |  |  | extern unsigned long omap243x_sram_ddr_init_sz; | 
					
						
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							|  |  |  | extern u32 omap243x_sram_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, | 
					
						
							|  |  |  | 						int bypass); | 
					
						
							|  |  |  | extern unsigned long omap243x_sram_set_prcm_sz; | 
					
						
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							|  |  |  | extern void omap243x_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, | 
					
						
							|  |  |  | 						u32 mem_type); | 
					
						
							|  |  |  | extern unsigned long omap243x_sram_reprogram_sdrc_sz; | 
					
						
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										 |  |  | extern u32 omap3_sram_configure_core_dpll( | 
					
						
							|  |  |  | 			u32 m2, u32 unlock_dll, u32 f, u32 inc, | 
					
						
							|  |  |  | 			u32 sdrc_rfr_ctrl_0, u32 sdrc_actim_ctrl_a_0, | 
					
						
							|  |  |  | 			u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0, | 
					
						
							|  |  |  | 			u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1, | 
					
						
							|  |  |  | 			u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1); | 
					
						
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										 |  |  | extern unsigned long omap3_sram_configure_core_dpll_sz; | 
					
						
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										 |  |  | #ifdef CONFIG_PM
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							|  |  |  | extern void omap_push_sram_idle(void); | 
					
						
							|  |  |  | #else
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							|  |  |  | static inline void omap_push_sram_idle(void) {} | 
					
						
							|  |  |  | #endif /* CONFIG_PM */
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										 |  |  | #endif
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