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											2011-08-22 08:33:30 +01:00
										 |  |  | /*
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							|  |  |  |  * Structures and registers for GPIO access in the Nomadik SoC | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * Copyright (C) 2008 STMicroelectronics | 
					
						
							|  |  |  |  *     Author: Prafulla WADASKAR <prafulla.wadaskar@st.com> | 
					
						
							|  |  |  |  * Copyright (C) 2009 Alessandro Rubini <rubini@unipv.it> | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * This program is free software; you can redistribute it and/or modify | 
					
						
							|  |  |  |  * it under the terms of the GNU General Public License version 2 as | 
					
						
							|  |  |  |  * published by the Free Software Foundation. | 
					
						
							|  |  |  |  */ | 
					
						
							|  |  |  | 
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							|  |  |  | #ifndef __PLAT_NOMADIK_GPIO
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							|  |  |  | #define __PLAT_NOMADIK_GPIO
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							| 
									
										
										
										
											2012-10-10 14:35:17 +02:00
										 |  |  | /*
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							|  |  |  |  * pin configurations are represented by 32-bit integers: | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  *	bit  0.. 8 - Pin Number (512 Pins Maximum) | 
					
						
							|  |  |  |  *	bit  9..10 - Alternate Function Selection | 
					
						
							|  |  |  |  *	bit 11..12 - Pull up/down state | 
					
						
							|  |  |  |  *	bit     13 - Sleep mode behaviour | 
					
						
							|  |  |  |  *	bit     14 - Direction | 
					
						
							|  |  |  |  *	bit     15 - Value (if output) | 
					
						
							|  |  |  |  *	bit 16..18 - SLPM pull up/down state | 
					
						
							|  |  |  |  *	bit 19..20 - SLPM direction | 
					
						
							|  |  |  |  *	bit 21..22 - SLPM Value (if output) | 
					
						
							|  |  |  |  *	bit 23..25 - PDIS value (if input) | 
					
						
							|  |  |  |  *	bit	26 - Gpio mode | 
					
						
							|  |  |  |  *	bit	27 - Sleep mode | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * to facilitate the definition, the following macros are provided | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * PIN_CFG_DEFAULT - default config (0): | 
					
						
							|  |  |  |  *		     pull up/down = disabled | 
					
						
							|  |  |  |  *		     sleep mode = input/wakeup | 
					
						
							|  |  |  |  *		     direction = input | 
					
						
							|  |  |  |  *		     value = low | 
					
						
							|  |  |  |  *		     SLPM direction = same as normal | 
					
						
							|  |  |  |  *		     SLPM pull = same as normal | 
					
						
							|  |  |  |  *		     SLPM value = same as normal | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * PIN_CFG	   - default config with alternate function | 
					
						
							|  |  |  |  */ | 
					
						
							|  |  |  | 
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							|  |  |  | typedef unsigned long pin_cfg_t; | 
					
						
							|  |  |  | 
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							|  |  |  | #define PIN_NUM_MASK		0x1ff
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							|  |  |  | #define PIN_NUM(x)		((x) & PIN_NUM_MASK)
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							|  |  |  | #define PIN_ALT_SHIFT		9
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							|  |  |  | #define PIN_ALT_MASK		(0x3 << PIN_ALT_SHIFT)
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							|  |  |  | #define PIN_ALT(x)		(((x) & PIN_ALT_MASK) >> PIN_ALT_SHIFT)
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							|  |  |  | #define PIN_GPIO		(NMK_GPIO_ALT_GPIO << PIN_ALT_SHIFT)
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							|  |  |  | #define PIN_ALT_A		(NMK_GPIO_ALT_A << PIN_ALT_SHIFT)
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							|  |  |  | #define PIN_ALT_B		(NMK_GPIO_ALT_B << PIN_ALT_SHIFT)
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							|  |  |  | #define PIN_ALT_C		(NMK_GPIO_ALT_C << PIN_ALT_SHIFT)
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							|  |  |  | #define PIN_PULL_SHIFT		11
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							|  |  |  | #define PIN_PULL_MASK		(0x3 << PIN_PULL_SHIFT)
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							|  |  |  | #define PIN_PULL(x)		(((x) & PIN_PULL_MASK) >> PIN_PULL_SHIFT)
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							|  |  |  | #define PIN_PULL_NONE		(NMK_GPIO_PULL_NONE << PIN_PULL_SHIFT)
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							|  |  |  | #define PIN_PULL_UP		(NMK_GPIO_PULL_UP << PIN_PULL_SHIFT)
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							|  |  |  | #define PIN_PULL_DOWN		(NMK_GPIO_PULL_DOWN << PIN_PULL_SHIFT)
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							|  |  |  | #define PIN_SLPM_SHIFT		13
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							|  |  |  | #define PIN_SLPM_MASK		(0x1 << PIN_SLPM_SHIFT)
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							|  |  |  | #define PIN_SLPM(x)		(((x) & PIN_SLPM_MASK) >> PIN_SLPM_SHIFT)
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							|  |  |  | #define PIN_SLPM_MAKE_INPUT	(NMK_GPIO_SLPM_INPUT << PIN_SLPM_SHIFT)
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							|  |  |  | #define PIN_SLPM_NOCHANGE	(NMK_GPIO_SLPM_NOCHANGE << PIN_SLPM_SHIFT)
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							|  |  |  | /* These two replace the above in DB8500v2+ */ | 
					
						
							|  |  |  | #define PIN_SLPM_WAKEUP_ENABLE	(NMK_GPIO_SLPM_WAKEUP_ENABLE << PIN_SLPM_SHIFT)
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							|  |  |  | #define PIN_SLPM_WAKEUP_DISABLE	(NMK_GPIO_SLPM_WAKEUP_DISABLE << PIN_SLPM_SHIFT)
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							|  |  |  | #define PIN_SLPM_USE_MUX_SETTINGS_IN_SLEEP PIN_SLPM_WAKEUP_DISABLE
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							|  |  |  | 
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							|  |  |  | #define PIN_SLPM_GPIO  PIN_SLPM_WAKEUP_ENABLE /* In SLPM, pin is a gpio */
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							|  |  |  | #define PIN_SLPM_ALTFUNC PIN_SLPM_WAKEUP_DISABLE /* In SLPM, pin is altfunc */
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							|  |  |  | 
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							|  |  |  | #define PIN_DIR_SHIFT		14
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							|  |  |  | #define PIN_DIR_MASK		(0x1 << PIN_DIR_SHIFT)
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							|  |  |  | #define PIN_DIR(x)		(((x) & PIN_DIR_MASK) >> PIN_DIR_SHIFT)
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							|  |  |  | #define PIN_DIR_INPUT		(0 << PIN_DIR_SHIFT)
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							|  |  |  | #define PIN_DIR_OUTPUT		(1 << PIN_DIR_SHIFT)
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							|  |  |  | #define PIN_VAL_SHIFT		15
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							|  |  |  | #define PIN_VAL_MASK		(0x1 << PIN_VAL_SHIFT)
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							|  |  |  | #define PIN_VAL(x)		(((x) & PIN_VAL_MASK) >> PIN_VAL_SHIFT)
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							|  |  |  | #define PIN_VAL_LOW		(0 << PIN_VAL_SHIFT)
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							|  |  |  | #define PIN_VAL_HIGH		(1 << PIN_VAL_SHIFT)
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							|  |  |  | 
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							|  |  |  | #define PIN_SLPM_PULL_SHIFT	16
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							|  |  |  | #define PIN_SLPM_PULL_MASK	(0x7 << PIN_SLPM_PULL_SHIFT)
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							|  |  |  | #define PIN_SLPM_PULL(x)	\
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							|  |  |  | 	(((x) & PIN_SLPM_PULL_MASK) >> PIN_SLPM_PULL_SHIFT) | 
					
						
							|  |  |  | #define PIN_SLPM_PULL_NONE	\
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							|  |  |  | 	((1 + NMK_GPIO_PULL_NONE) << PIN_SLPM_PULL_SHIFT) | 
					
						
							|  |  |  | #define PIN_SLPM_PULL_UP	\
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							|  |  |  | 	((1 + NMK_GPIO_PULL_UP) << PIN_SLPM_PULL_SHIFT) | 
					
						
							|  |  |  | #define PIN_SLPM_PULL_DOWN	\
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							|  |  |  | 	((1 + NMK_GPIO_PULL_DOWN) << PIN_SLPM_PULL_SHIFT) | 
					
						
							|  |  |  | 
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							|  |  |  | #define PIN_SLPM_DIR_SHIFT	19
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							|  |  |  | #define PIN_SLPM_DIR_MASK	(0x3 << PIN_SLPM_DIR_SHIFT)
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							|  |  |  | #define PIN_SLPM_DIR(x)		\
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							|  |  |  | 	(((x) & PIN_SLPM_DIR_MASK) >> PIN_SLPM_DIR_SHIFT) | 
					
						
							|  |  |  | #define PIN_SLPM_DIR_INPUT	((1 + 0) << PIN_SLPM_DIR_SHIFT)
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							|  |  |  | #define PIN_SLPM_DIR_OUTPUT	((1 + 1) << PIN_SLPM_DIR_SHIFT)
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							|  |  |  | #define PIN_SLPM_VAL_SHIFT	21
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							|  |  |  | #define PIN_SLPM_VAL_MASK	(0x3 << PIN_SLPM_VAL_SHIFT)
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							|  |  |  | #define PIN_SLPM_VAL(x)		\
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							|  |  |  | 	(((x) & PIN_SLPM_VAL_MASK) >> PIN_SLPM_VAL_SHIFT) | 
					
						
							|  |  |  | #define PIN_SLPM_VAL_LOW	((1 + 0) << PIN_SLPM_VAL_SHIFT)
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							|  |  |  | #define PIN_SLPM_VAL_HIGH	((1 + 1) << PIN_SLPM_VAL_SHIFT)
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							|  |  |  | #define PIN_SLPM_PDIS_SHIFT		23
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							|  |  |  | #define PIN_SLPM_PDIS_MASK		(0x3 << PIN_SLPM_PDIS_SHIFT)
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							|  |  |  | #define PIN_SLPM_PDIS(x)	\
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							|  |  |  | 	(((x) & PIN_SLPM_PDIS_MASK) >> PIN_SLPM_PDIS_SHIFT) | 
					
						
							|  |  |  | #define PIN_SLPM_PDIS_NO_CHANGE		(0 << PIN_SLPM_PDIS_SHIFT)
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							|  |  |  | #define PIN_SLPM_PDIS_DISABLED		(1 << PIN_SLPM_PDIS_SHIFT)
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							|  |  |  | #define PIN_SLPM_PDIS_ENABLED		(2 << PIN_SLPM_PDIS_SHIFT)
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							|  |  |  | #define PIN_LOWEMI_SHIFT	25
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							|  |  |  | #define PIN_LOWEMI_MASK		(0x1 << PIN_LOWEMI_SHIFT)
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							|  |  |  | #define PIN_LOWEMI(x)		(((x) & PIN_LOWEMI_MASK) >> PIN_LOWEMI_SHIFT)
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							|  |  |  | #define PIN_LOWEMI_DISABLED	(0 << PIN_LOWEMI_SHIFT)
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							|  |  |  | #define PIN_LOWEMI_ENABLED	(1 << PIN_LOWEMI_SHIFT)
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							|  |  |  | #define PIN_GPIOMODE_SHIFT	26
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							|  |  |  | #define PIN_GPIOMODE_MASK	(0x1 << PIN_GPIOMODE_SHIFT)
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							|  |  |  | #define PIN_GPIOMODE(x)		(((x) & PIN_GPIOMODE_MASK) >> PIN_GPIOMODE_SHIFT)
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							|  |  |  | #define PIN_GPIOMODE_DISABLED	(0 << PIN_GPIOMODE_SHIFT)
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							|  |  |  | #define PIN_GPIOMODE_ENABLED	(1 << PIN_GPIOMODE_SHIFT)
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							|  |  |  | #define PIN_SLEEPMODE_SHIFT	27
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							|  |  |  | #define PIN_SLEEPMODE_MASK	(0x1 << PIN_SLEEPMODE_SHIFT)
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							|  |  |  | #define PIN_SLEEPMODE(x)	(((x) & PIN_SLEEPMODE_MASK) >> PIN_SLEEPMODE_SHIFT)
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							|  |  |  | #define PIN_SLEEPMODE_DISABLED	(0 << PIN_SLEEPMODE_SHIFT)
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							|  |  |  | #define PIN_SLEEPMODE_ENABLED	(1 << PIN_SLEEPMODE_SHIFT)
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							|  |  |  | /* Shortcuts.  Use these instead of separate DIR, PULL, and VAL.  */ | 
					
						
							|  |  |  | #define PIN_INPUT_PULLDOWN	(PIN_DIR_INPUT | PIN_PULL_DOWN)
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							|  |  |  | #define PIN_INPUT_PULLUP	(PIN_DIR_INPUT | PIN_PULL_UP)
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							|  |  |  | #define PIN_INPUT_NOPULL	(PIN_DIR_INPUT | PIN_PULL_NONE)
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							|  |  |  | #define PIN_OUTPUT_LOW		(PIN_DIR_OUTPUT | PIN_VAL_LOW)
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							|  |  |  | #define PIN_OUTPUT_HIGH		(PIN_DIR_OUTPUT | PIN_VAL_HIGH)
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							|  |  |  | #define PIN_SLPM_INPUT_PULLDOWN	(PIN_SLPM_DIR_INPUT | PIN_SLPM_PULL_DOWN)
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							|  |  |  | #define PIN_SLPM_INPUT_PULLUP	(PIN_SLPM_DIR_INPUT | PIN_SLPM_PULL_UP)
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							|  |  |  | #define PIN_SLPM_INPUT_NOPULL	(PIN_SLPM_DIR_INPUT | PIN_SLPM_PULL_NONE)
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							|  |  |  | #define PIN_SLPM_OUTPUT_LOW	(PIN_SLPM_DIR_OUTPUT | PIN_SLPM_VAL_LOW)
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							|  |  |  | #define PIN_SLPM_OUTPUT_HIGH	(PIN_SLPM_DIR_OUTPUT | PIN_SLPM_VAL_HIGH)
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							|  |  |  | #define PIN_CFG_DEFAULT		(0)
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							|  |  |  | 
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							|  |  |  | #define PIN_CFG(num, alt)		\
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							|  |  |  | 	(PIN_CFG_DEFAULT |\ | 
					
						
							|  |  |  | 	 (PIN_NUM(num) | PIN_##alt)) | 
					
						
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							|  |  |  | #define PIN_CFG_INPUT(num, alt, pull)		\
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							|  |  |  | 	(PIN_CFG_DEFAULT |\ | 
					
						
							|  |  |  | 	 (PIN_NUM(num) | PIN_##alt | PIN_INPUT_##pull)) | 
					
						
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							|  |  |  | #define PIN_CFG_OUTPUT(num, alt, val)		\
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							|  |  |  | 	(PIN_CFG_DEFAULT |\ | 
					
						
							|  |  |  | 	 (PIN_NUM(num) | PIN_##alt | PIN_OUTPUT_##val)) | 
					
						
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											2011-08-22 08:33:30 +01:00
										 |  |  | /*
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							|  |  |  |  * "nmk_gpio" and "NMK_GPIO" stand for "Nomadik GPIO", leaving | 
					
						
							|  |  |  |  * the "gpio" namespace for generic and cross-machine functions | 
					
						
							|  |  |  |  */ | 
					
						
							|  |  |  | 
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											2012-10-08 16:35:09 +02:00
										 |  |  | #define GPIO_BLOCK_SHIFT 5
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							|  |  |  | #define NMK_GPIO_PER_CHIP (1 << GPIO_BLOCK_SHIFT)
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										 |  |  | /* Register in the logic block */ | 
					
						
							|  |  |  | #define NMK_GPIO_DAT	0x00
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							|  |  |  | #define NMK_GPIO_DATS	0x04
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							|  |  |  | #define NMK_GPIO_DATC	0x08
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							|  |  |  | #define NMK_GPIO_PDIS	0x0c
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							|  |  |  | #define NMK_GPIO_DIR	0x10
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							|  |  |  | #define NMK_GPIO_DIRS	0x14
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							|  |  |  | #define NMK_GPIO_DIRC	0x18
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							|  |  |  | #define NMK_GPIO_SLPC	0x1c
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							|  |  |  | #define NMK_GPIO_AFSLA	0x20
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							|  |  |  | #define NMK_GPIO_AFSLB	0x24
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										 |  |  | #define NMK_GPIO_LOWEMI	0x28
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										 |  |  | 
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							|  |  |  | #define NMK_GPIO_RIMSC	0x40
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							|  |  |  | #define NMK_GPIO_FIMSC	0x44
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							|  |  |  | #define NMK_GPIO_IS	0x48
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							|  |  |  | #define NMK_GPIO_IC	0x4c
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							|  |  |  | #define NMK_GPIO_RWIMSC	0x50
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							|  |  |  | #define NMK_GPIO_FWIMSC	0x54
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							|  |  |  | #define NMK_GPIO_WKS	0x58
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										 |  |  | /* These appear in DB8540 and later ASICs */ | 
					
						
							|  |  |  | #define NMK_GPIO_EDGELEVEL 0x5C
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							|  |  |  | #define NMK_GPIO_LEVEL	0x60
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											2011-08-22 08:33:30 +01:00
										 |  |  | 
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							|  |  |  | /* Alternate functions: function C is set in hw by setting both A and B */ | 
					
						
							|  |  |  | #define NMK_GPIO_ALT_GPIO	0
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							|  |  |  | #define NMK_GPIO_ALT_A	1
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							|  |  |  | #define NMK_GPIO_ALT_B	2
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							|  |  |  | #define NMK_GPIO_ALT_C	(NMK_GPIO_ALT_A | NMK_GPIO_ALT_B)
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							|  |  |  | 
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										 |  |  | #define NMK_GPIO_ALT_CX_SHIFT 2
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							|  |  |  | #define NMK_GPIO_ALT_C1	((1<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
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							|  |  |  | #define NMK_GPIO_ALT_C2	((2<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
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							|  |  |  | #define NMK_GPIO_ALT_C3	((3<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
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							|  |  |  | #define NMK_GPIO_ALT_C4	((4<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
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										 |  |  | /* Pull up/down values */ | 
					
						
							|  |  |  | enum nmk_gpio_pull { | 
					
						
							|  |  |  | 	NMK_GPIO_PULL_NONE, | 
					
						
							|  |  |  | 	NMK_GPIO_PULL_UP, | 
					
						
							|  |  |  | 	NMK_GPIO_PULL_DOWN, | 
					
						
							|  |  |  | }; | 
					
						
							|  |  |  | 
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							|  |  |  | /* Sleep mode */ | 
					
						
							|  |  |  | enum nmk_gpio_slpm { | 
					
						
							|  |  |  | 	NMK_GPIO_SLPM_INPUT, | 
					
						
							|  |  |  | 	NMK_GPIO_SLPM_WAKEUP_ENABLE = NMK_GPIO_SLPM_INPUT, | 
					
						
							|  |  |  | 	NMK_GPIO_SLPM_NOCHANGE, | 
					
						
							|  |  |  | 	NMK_GPIO_SLPM_WAKEUP_DISABLE = NMK_GPIO_SLPM_NOCHANGE, | 
					
						
							|  |  |  | }; | 
					
						
							|  |  |  | 
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							|  |  |  | /*
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							|  |  |  |  * Platform data to register a block: only the initial gpio/irq number. | 
					
						
							|  |  |  |  */ | 
					
						
							|  |  |  | struct nmk_gpio_platform_data { | 
					
						
							|  |  |  | 	char *name; | 
					
						
							|  |  |  | 	int first_gpio; | 
					
						
							|  |  |  | 	int first_irq; | 
					
						
							|  |  |  | 	int num_gpio; | 
					
						
							|  |  |  | 	u32 (*get_secondary_status)(unsigned int bank); | 
					
						
							|  |  |  | 	void (*set_ioforce)(bool enable); | 
					
						
							|  |  |  | 	bool supports_sleepmode; | 
					
						
							|  |  |  | }; | 
					
						
							|  |  |  | 
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							|  |  |  | #endif /* __PLAT_NOMADIK_GPIO */
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