68 lines
2.2 KiB
C
68 lines
2.2 KiB
C
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/*
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* Copyright (c) 2014 Zhang, Keguang <keguang.zhang@gmail.com>
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*
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* Loongson 1 MUX Register Definitions.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#ifndef __ASM_MACH_LOONGSON1_REGS_MUX_H
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#define __ASM_MACH_LOONGSON1_REGS_MUX_H
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#define LS1X_MUX_REG(x) \
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((void __iomem *)KSEG1ADDR(LS1X_MUX_BASE + (x)))
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#define LS1X_MUX_CTRL0 LS1X_MUX_REG(0x0)
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#define LS1X_MUX_CTRL1 LS1X_MUX_REG(0x4)
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/* MUX CTRL0 Register Bits */
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#define UART0_USE_PWM23 (0x1 << 28)
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#define UART0_USE_PWM01 (0x1 << 27)
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#define UART1_USE_LCD0_5_6_11 (0x1 << 26)
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#define I2C2_USE_CAN1 (0x1 << 25)
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#define I2C1_USE_CAN0 (0x1 << 24)
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#define NAND3_USE_UART5 (0x1 << 23)
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#define NAND3_USE_UART4 (0x1 << 22)
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#define NAND3_USE_UART1_DAT (0x1 << 21)
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#define NAND3_USE_UART1_CTS (0x1 << 20)
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#define NAND3_USE_PWM23 (0x1 << 19)
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#define NAND3_USE_PWM01 (0x1 << 18)
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#define NAND2_USE_UART5 (0x1 << 17)
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#define NAND2_USE_UART4 (0x1 << 16)
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#define NAND2_USE_UART1_DAT (0x1 << 15)
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#define NAND2_USE_UART1_CTS (0x1 << 14)
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#define NAND2_USE_PWM23 (0x1 << 13)
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#define NAND2_USE_PWM01 (0x1 << 12)
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#define NAND1_USE_UART5 (0x1 << 11)
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#define NAND1_USE_UART4 (0x1 << 10)
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#define NAND1_USE_UART1_DAT (0x1 << 9)
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#define NAND1_USE_UART1_CTS (0x1 << 8)
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#define NAND1_USE_PWM23 (0x1 << 7)
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#define NAND1_USE_PWM01 (0x1 << 6)
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#define GMAC1_USE_UART1 (0x1 << 4)
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#define GMAC1_USE_UART0 (0x1 << 3)
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#define LCD_USE_UART0_DAT (0x1 << 2)
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#define LCD_USE_UART15 (0x1 << 1)
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#define LCD_USE_UART0 0x1
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/* MUX CTRL1 Register Bits */
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#define USB_RESET (0x1 << 31)
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#define SPI1_CS_USE_PWM01 (0x1 << 24)
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#define SPI1_USE_CAN (0x1 << 23)
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#define DISABLE_DDR_CONFSPACE (0x1 << 20)
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#define DDR32TO16EN (0x1 << 16)
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#define GMAC1_SHUT (0x1 << 13)
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#define GMAC0_SHUT (0x1 << 12)
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#define USB_SHUT (0x1 << 11)
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#define UART1_3_USE_CAN1 (0x1 << 5)
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#define UART1_2_USE_CAN0 (0x1 << 4)
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#define GMAC1_USE_TXCLK (0x1 << 3)
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#define GMAC0_USE_TXCLK (0x1 << 2)
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#define GMAC1_USE_PWM23 (0x1 << 1)
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#define GMAC0_USE_PWM01 0x1
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#endif /* __ASM_MACH_LOONGSON1_REGS_MUX_H */
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