2009-03-27 14:25:20 +01:00
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/*
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* Copyright (C) 2007-2009 Michal Simek <monstr@monstr.eu>
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* Copyright (C) 2007-2009 PetaLogix
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* Copyright (C) 2006 Atmark Techno, Inc.
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/linkage.h>
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#include <asm/thread_info.h>
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2009-05-26 16:30:26 +02:00
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#include <linux/errno.h>
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2009-03-27 14:25:20 +01:00
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#include <asm/entry.h>
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#include <asm/asm-offsets.h>
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#include <asm/registers.h>
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#include <asm/unistd.h>
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#include <asm/percpu.h>
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#include <asm/signal.h>
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#if CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR
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.macro disable_irq
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msrclr r0, MSR_IE
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.endm
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.macro enable_irq
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msrset r0, MSR_IE
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.endm
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.macro clear_bip
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msrclr r0, MSR_BIP
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.endm
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#else
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.macro disable_irq
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mfs r11, rmsr
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andi r11, r11, ~MSR_IE
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mts rmsr, r11
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.endm
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.macro enable_irq
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mfs r11, rmsr
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ori r11, r11, MSR_IE
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mts rmsr, r11
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.endm
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.macro clear_bip
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mfs r11, rmsr
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andi r11, r11, ~MSR_BIP
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mts rmsr, r11
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.endm
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#endif
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ENTRY(_interrupt)
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swi r1, r0, PER_CPU(ENTRY_SP) /* save the current sp */
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swi r11, r0, PER_CPU(R11_SAVE) /* temporarily save r11 */
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lwi r11, r0, PER_CPU(KM) /* load mode indicator */
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beqid r11, 1f
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nop
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brid 2f /* jump over */
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addik r1, r1, (-PT_SIZE) /* room for pt_regs (delay slot) */
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1: /* switch to kernel stack */
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lwi r1, r0, PER_CPU(CURRENT_SAVE) /* get the saved current */
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lwi r1, r1, TS_THREAD_INFO /* get the thread info */
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/* calculate kernel stack pointer */
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addik r1, r1, THREAD_SIZE - PT_SIZE
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2:
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swi r11, r1, PT_MODE /* store the mode */
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lwi r11, r0, PER_CPU(R11_SAVE) /* reload r11 */
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swi r2, r1, PT_R2
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swi r3, r1, PT_R3
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swi r4, r1, PT_R4
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swi r5, r1, PT_R5
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swi r6, r1, PT_R6
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swi r7, r1, PT_R7
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swi r8, r1, PT_R8
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swi r9, r1, PT_R9
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swi r10, r1, PT_R10
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swi r11, r1, PT_R11
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swi r12, r1, PT_R12
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swi r13, r1, PT_R13
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swi r14, r1, PT_R14
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swi r14, r1, PT_PC
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swi r15, r1, PT_R15
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swi r16, r1, PT_R16
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swi r17, r1, PT_R17
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swi r18, r1, PT_R18
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swi r19, r1, PT_R19
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swi r20, r1, PT_R20
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swi r21, r1, PT_R21
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swi r22, r1, PT_R22
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swi r23, r1, PT_R23
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swi r24, r1, PT_R24
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swi r25, r1, PT_R25
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swi r26, r1, PT_R26
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swi r27, r1, PT_R27
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swi r28, r1, PT_R28
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swi r29, r1, PT_R29
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swi r30, r1, PT_R30
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swi r31, r1, PT_R31
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/* special purpose registers */
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mfs r11, rmsr
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swi r11, r1, PT_MSR
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mfs r11, rear
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swi r11, r1, PT_EAR
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mfs r11, resr
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swi r11, r1, PT_ESR
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mfs r11, rfsr
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swi r11, r1, PT_FSR
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/* reload original stack pointer and save it */
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lwi r11, r0, PER_CPU(ENTRY_SP)
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swi r11, r1, PT_R1
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/* update mode indicator we are in kernel mode */
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addik r11, r0, 1
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swi r11, r0, PER_CPU(KM)
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/* restore r31 */
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lwi r31, r0, PER_CPU(CURRENT_SAVE)
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/* prepare the link register, the argument and jump */
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2011-02-01 09:00:57 +01:00
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addik r15, r0, ret_from_intr - 8
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2009-03-27 14:25:20 +01:00
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addk r6, r0, r15
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braid do_IRQ
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add r5, r0, r1
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ret_from_intr:
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lwi r11, r1, PT_MODE
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2010-02-01 06:34:45 -06:00
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bneid r11, no_intr_resched
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2009-03-27 14:25:20 +01:00
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2012-04-29 04:43:50 -04:00
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3:
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2009-03-27 14:25:20 +01:00
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lwi r6, r31, TS_THREAD_INFO /* get thread info */
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lwi r19, r6, TI_FLAGS /* get flags in thread info */
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/* do an extra work if any bits are set */
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andi r11, r19, _TIF_NEED_RESCHED
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beqi r11, 1f
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bralid r15, schedule
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nop
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2012-04-29 04:43:50 -04:00
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bri 3b
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2012-04-24 02:03:06 -04:00
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1: andi r11, r19, _TIF_SIGPENDING | _TIF_NOTIFY_RESUME
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2010-02-01 06:34:45 -06:00
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beqid r11, no_intr_resched
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2009-03-27 14:25:20 +01:00
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addk r5, r1, r0
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2012-04-24 02:03:06 -04:00
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bralid r15, do_notify_resume
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2009-03-27 14:25:20 +01:00
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addk r6, r0, r0
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2012-04-29 04:43:50 -04:00
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bri 3b
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2009-03-27 14:25:20 +01:00
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2010-02-01 06:34:45 -06:00
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no_intr_resched:
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/* Disable interrupts, we are now committed to the state restore */
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disable_irq
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2009-03-27 14:25:20 +01:00
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/* save mode indicator */
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lwi r11, r1, PT_MODE
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swi r11, r0, PER_CPU(KM)
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/* save r31 */
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swi r31, r0, PER_CPU(CURRENT_SAVE)
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restore_context:
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/* special purpose registers */
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lwi r11, r1, PT_FSR
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mts rfsr, r11
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lwi r11, r1, PT_ESR
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mts resr, r11
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lwi r11, r1, PT_EAR
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mts rear, r11
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lwi r11, r1, PT_MSR
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mts rmsr, r11
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lwi r31, r1, PT_R31
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lwi r30, r1, PT_R30
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lwi r29, r1, PT_R29
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lwi r28, r1, PT_R28
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lwi r27, r1, PT_R27
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lwi r26, r1, PT_R26
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lwi r25, r1, PT_R25
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lwi r24, r1, PT_R24
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lwi r23, r1, PT_R23
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lwi r22, r1, PT_R22
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lwi r21, r1, PT_R21
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lwi r20, r1, PT_R20
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lwi r19, r1, PT_R19
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lwi r18, r1, PT_R18
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lwi r17, r1, PT_R17
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lwi r16, r1, PT_R16
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lwi r15, r1, PT_R15
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lwi r14, r1, PT_PC
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lwi r13, r1, PT_R13
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lwi r12, r1, PT_R12
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lwi r11, r1, PT_R11
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lwi r10, r1, PT_R10
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lwi r9, r1, PT_R9
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lwi r8, r1, PT_R8
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lwi r7, r1, PT_R7
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lwi r6, r1, PT_R6
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lwi r5, r1, PT_R5
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lwi r4, r1, PT_R4
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lwi r3, r1, PT_R3
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lwi r2, r1, PT_R2
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lwi r1, r1, PT_R1
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rtid r14, 0
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nop
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ENTRY(_reset)
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brai 0;
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ENTRY(_user_exception)
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swi r1, r0, PER_CPU(ENTRY_SP) /* save the current sp */
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swi r11, r0, PER_CPU(R11_SAVE) /* temporarily save r11 */
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lwi r11, r0, PER_CPU(KM) /* load mode indicator */
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beqid r11, 1f /* Already in kernel mode? */
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nop
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brid 2f /* jump over */
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addik r1, r1, (-PT_SIZE) /* Room for pt_regs (delay slot) */
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1: /* Switch to kernel stack */
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lwi r1, r0, PER_CPU(CURRENT_SAVE) /* get the saved current */
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lwi r1, r1, TS_THREAD_INFO /* get the thread info */
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/* calculate kernel stack pointer */
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addik r1, r1, THREAD_SIZE - PT_SIZE
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2:
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swi r11, r1, PT_MODE /* store the mode */
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lwi r11, r0, PER_CPU(R11_SAVE) /* reload r11 */
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/* save them on stack */
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swi r2, r1, PT_R2
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swi r3, r1, PT_R3 /* r3: _always_ in clobber list; see unistd.h */
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swi r4, r1, PT_R4 /* r4: _always_ in clobber list; see unistd.h */
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swi r5, r1, PT_R5
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swi r6, r1, PT_R6
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swi r7, r1, PT_R7
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swi r8, r1, PT_R8
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swi r9, r1, PT_R9
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swi r10, r1, PT_R10
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swi r11, r1, PT_R11
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/* r12: _always_ in clobber list; see unistd.h */
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swi r12, r1, PT_R12
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swi r13, r1, PT_R13
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/* r14: _always_ in clobber list; see unistd.h */
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swi r14, r1, PT_R14
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/* but we want to return to the next inst. */
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addik r14, r14, 0x4
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swi r14, r1, PT_PC /* increment by 4 and store in pc */
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swi r15, r1, PT_R15
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swi r16, r1, PT_R16
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swi r17, r1, PT_R17
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swi r18, r1, PT_R18
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swi r19, r1, PT_R19
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swi r20, r1, PT_R20
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swi r21, r1, PT_R21
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swi r22, r1, PT_R22
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swi r23, r1, PT_R23
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swi r24, r1, PT_R24
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swi r25, r1, PT_R25
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swi r26, r1, PT_R26
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swi r27, r1, PT_R27
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swi r28, r1, PT_R28
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swi r29, r1, PT_R29
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swi r30, r1, PT_R30
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swi r31, r1, PT_R31
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disable_irq
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nop /* make sure IE bit is in effect */
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clear_bip /* once IE is in effect it is safe to clear BIP */
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nop
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/* special purpose registers */
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mfs r11, rmsr
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swi r11, r1, PT_MSR
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mfs r11, rear
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swi r11, r1, PT_EAR
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mfs r11, resr
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swi r11, r1, PT_ESR
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mfs r11, rfsr
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swi r11, r1, PT_FSR
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/* reload original stack pointer and save it */
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lwi r11, r0, PER_CPU(ENTRY_SP)
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swi r11, r1, PT_R1
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/* update mode indicator we are in kernel mode */
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addik r11, r0, 1
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swi r11, r0, PER_CPU(KM)
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/* restore r31 */
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lwi r31, r0, PER_CPU(CURRENT_SAVE)
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/* re-enable interrupts now we are in kernel mode */
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enable_irq
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/* See if the system call number is valid. */
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addi r11, r12, -__NR_syscalls
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bgei r11, 1f /* return to user if not valid */
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/* Figure out which function to use for this system call. */
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/* Note Microblaze barrel shift is optional, so don't rely on it */
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add r12, r12, r12 /* convert num -> ptr */
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2012-04-29 04:11:34 -04:00
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addik r30, r0, 1 /* restarts allowed */
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2009-03-27 14:25:20 +01:00
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add r12, r12, r12
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lwi r12, r12, sys_call_table /* Get function pointer */
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2011-02-01 09:00:57 +01:00
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addik r15, r0, ret_to_user-8 /* set return address */
|
2009-03-27 14:25:20 +01:00
|
|
|
bra r12 /* Make the system call. */
|
|
|
|
|
bri 0 /* won't reach here */
|
|
|
|
|
1:
|
|
|
|
|
brid ret_to_user /* jump to syscall epilogue */
|
|
|
|
|
addi r3, r0, -ENOSYS /* set errno in delay slot */
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Debug traps are like a system call, but entered via brki r14, 0x60
|
2012-04-24 02:03:06 -04:00
|
|
|
* All we need to do is send the SIGTRAP signal to current, ptrace and
|
|
|
|
|
* do_notify_resume will handle the rest
|
2009-03-27 14:25:20 +01:00
|
|
|
*/
|
|
|
|
|
ENTRY(_debug_exception)
|
|
|
|
|
swi r1, r0, PER_CPU(ENTRY_SP) /* save the current sp */
|
|
|
|
|
lwi r1, r0, PER_CPU(CURRENT_SAVE) /* get the saved current */
|
|
|
|
|
lwi r1, r1, TS_THREAD_INFO /* get the thread info */
|
|
|
|
|
addik r1, r1, THREAD_SIZE - PT_SIZE /* get the kernel stack */
|
|
|
|
|
swi r11, r0, PER_CPU(R11_SAVE) /* temporarily save r11 */
|
|
|
|
|
lwi r11, r0, PER_CPU(KM) /* load mode indicator */
|
|
|
|
|
//save_context:
|
|
|
|
|
swi r11, r1, PT_MODE /* store the mode */
|
|
|
|
|
lwi r11, r0, PER_CPU(R11_SAVE) /* reload r11 */
|
|
|
|
|
/* save them on stack */
|
|
|
|
|
swi r2, r1, PT_R2
|
|
|
|
|
swi r3, r1, PT_R3 /* r3: _always_ in clobber list; see unistd.h */
|
|
|
|
|
swi r4, r1, PT_R4 /* r4: _always_ in clobber list; see unistd.h */
|
|
|
|
|
swi r5, r1, PT_R5
|
|
|
|
|
swi r6, r1, PT_R6
|
|
|
|
|
swi r7, r1, PT_R7
|
|
|
|
|
swi r8, r1, PT_R8
|
|
|
|
|
swi r9, r1, PT_R9
|
|
|
|
|
swi r10, r1, PT_R10
|
|
|
|
|
swi r11, r1, PT_R11
|
|
|
|
|
/* r12: _always_ in clobber list; see unistd.h */
|
|
|
|
|
swi r12, r1, PT_R12
|
|
|
|
|
swi r13, r1, PT_R13
|
|
|
|
|
/* r14: _always_ in clobber list; see unistd.h */
|
|
|
|
|
swi r14, r1, PT_R14
|
|
|
|
|
swi r14, r1, PT_PC /* Will return to interrupted instruction */
|
|
|
|
|
swi r15, r1, PT_R15
|
|
|
|
|
swi r16, r1, PT_R16
|
|
|
|
|
swi r17, r1, PT_R17
|
|
|
|
|
swi r18, r1, PT_R18
|
|
|
|
|
swi r19, r1, PT_R19
|
|
|
|
|
swi r20, r1, PT_R20
|
|
|
|
|
swi r21, r1, PT_R21
|
|
|
|
|
swi r22, r1, PT_R22
|
|
|
|
|
swi r23, r1, PT_R23
|
|
|
|
|
swi r24, r1, PT_R24
|
|
|
|
|
swi r25, r1, PT_R25
|
|
|
|
|
swi r26, r1, PT_R26
|
|
|
|
|
swi r27, r1, PT_R27
|
|
|
|
|
swi r28, r1, PT_R28
|
|
|
|
|
swi r29, r1, PT_R29
|
|
|
|
|
swi r30, r1, PT_R30
|
|
|
|
|
swi r31, r1, PT_R31
|
|
|
|
|
|
|
|
|
|
disable_irq
|
|
|
|
|
nop /* make sure IE bit is in effect */
|
|
|
|
|
clear_bip /* once IE is in effect it is safe to clear BIP */
|
|
|
|
|
nop
|
|
|
|
|
|
|
|
|
|
/* special purpose registers */
|
|
|
|
|
mfs r11, rmsr
|
|
|
|
|
swi r11, r1, PT_MSR
|
|
|
|
|
mfs r11, rear
|
|
|
|
|
swi r11, r1, PT_EAR
|
|
|
|
|
mfs r11, resr
|
|
|
|
|
swi r11, r1, PT_ESR
|
|
|
|
|
mfs r11, rfsr
|
|
|
|
|
swi r11, r1, PT_FSR
|
|
|
|
|
/* reload original stack pointer and save it */
|
|
|
|
|
lwi r11, r0, PER_CPU(ENTRY_SP)
|
|
|
|
|
swi r11, r1, PT_R1
|
|
|
|
|
/* update mode indicator we are in kernel mode */
|
|
|
|
|
addik r11, r0, 1
|
|
|
|
|
swi r11, r0, PER_CPU(KM)
|
|
|
|
|
/* restore r31 */
|
|
|
|
|
lwi r31, r0, PER_CPU(CURRENT_SAVE)
|
|
|
|
|
/* re-enable interrupts now we are in kernel mode */
|
|
|
|
|
enable_irq
|
|
|
|
|
|
|
|
|
|
addi r5, r0, SIGTRAP /* sending the trap signal */
|
|
|
|
|
add r6, r0, r31 /* to current */
|
|
|
|
|
bralid r15, send_sig
|
|
|
|
|
add r7, r0, r0 /* 3rd param zero */
|
|
|
|
|
|
2012-04-29 04:11:34 -04:00
|
|
|
addik r30, r0, 1 /* restarts allowed ??? */
|
2009-03-27 14:25:20 +01:00
|
|
|
/* Restore r3/r4 to work around how ret_to_user works */
|
|
|
|
|
lwi r3, r1, PT_R3
|
|
|
|
|
lwi r4, r1, PT_R4
|
|
|
|
|
bri ret_to_user
|
|
|
|
|
|
|
|
|
|
ENTRY(_break)
|
|
|
|
|
bri 0
|
|
|
|
|
|
|
|
|
|
/* struct task_struct *_switch_to(struct thread_info *prev,
|
|
|
|
|
struct thread_info *next); */
|
|
|
|
|
ENTRY(_switch_to)
|
|
|
|
|
/* prepare return value */
|
|
|
|
|
addk r3, r0, r31
|
|
|
|
|
|
|
|
|
|
/* save registers in cpu_context */
|
|
|
|
|
/* use r11 and r12, volatile registers, as temp register */
|
|
|
|
|
addik r11, r5, TI_CPU_CONTEXT
|
|
|
|
|
swi r1, r11, CC_R1
|
|
|
|
|
swi r2, r11, CC_R2
|
|
|
|
|
/* skip volatile registers.
|
|
|
|
|
* they are saved on stack when we jumped to _switch_to() */
|
|
|
|
|
/* dedicated registers */
|
|
|
|
|
swi r13, r11, CC_R13
|
|
|
|
|
swi r14, r11, CC_R14
|
|
|
|
|
swi r15, r11, CC_R15
|
|
|
|
|
swi r16, r11, CC_R16
|
|
|
|
|
swi r17, r11, CC_R17
|
|
|
|
|
swi r18, r11, CC_R18
|
|
|
|
|
/* save non-volatile registers */
|
|
|
|
|
swi r19, r11, CC_R19
|
|
|
|
|
swi r20, r11, CC_R20
|
|
|
|
|
swi r21, r11, CC_R21
|
|
|
|
|
swi r22, r11, CC_R22
|
|
|
|
|
swi r23, r11, CC_R23
|
|
|
|
|
swi r24, r11, CC_R24
|
|
|
|
|
swi r25, r11, CC_R25
|
|
|
|
|
swi r26, r11, CC_R26
|
|
|
|
|
swi r27, r11, CC_R27
|
|
|
|
|
swi r28, r11, CC_R28
|
|
|
|
|
swi r29, r11, CC_R29
|
|
|
|
|
swi r30, r11, CC_R30
|
|
|
|
|
/* special purpose registers */
|
|
|
|
|
mfs r12, rmsr
|
|
|
|
|
swi r12, r11, CC_MSR
|
|
|
|
|
mfs r12, rear
|
|
|
|
|
swi r12, r11, CC_EAR
|
|
|
|
|
mfs r12, resr
|
|
|
|
|
swi r12, r11, CC_ESR
|
|
|
|
|
mfs r12, rfsr
|
|
|
|
|
swi r12, r11, CC_FSR
|
|
|
|
|
|
|
|
|
|
/* update r31, the current */
|
|
|
|
|
lwi r31, r6, TI_TASK
|
|
|
|
|
swi r31, r0, PER_CPU(CURRENT_SAVE)
|
|
|
|
|
|
|
|
|
|
/* get new process' cpu context and restore */
|
|
|
|
|
addik r11, r6, TI_CPU_CONTEXT
|
|
|
|
|
|
|
|
|
|
/* special purpose registers */
|
|
|
|
|
lwi r12, r11, CC_FSR
|
|
|
|
|
mts rfsr, r12
|
|
|
|
|
lwi r12, r11, CC_ESR
|
|
|
|
|
mts resr, r12
|
|
|
|
|
lwi r12, r11, CC_EAR
|
|
|
|
|
mts rear, r12
|
|
|
|
|
lwi r12, r11, CC_MSR
|
|
|
|
|
mts rmsr, r12
|
|
|
|
|
/* non-volatile registers */
|
|
|
|
|
lwi r30, r11, CC_R30
|
|
|
|
|
lwi r29, r11, CC_R29
|
|
|
|
|
lwi r28, r11, CC_R28
|
|
|
|
|
lwi r27, r11, CC_R27
|
|
|
|
|
lwi r26, r11, CC_R26
|
|
|
|
|
lwi r25, r11, CC_R25
|
|
|
|
|
lwi r24, r11, CC_R24
|
|
|
|
|
lwi r23, r11, CC_R23
|
|
|
|
|
lwi r22, r11, CC_R22
|
|
|
|
|
lwi r21, r11, CC_R21
|
|
|
|
|
lwi r20, r11, CC_R20
|
|
|
|
|
lwi r19, r11, CC_R19
|
|
|
|
|
/* dedicated registers */
|
|
|
|
|
lwi r18, r11, CC_R18
|
|
|
|
|
lwi r17, r11, CC_R17
|
|
|
|
|
lwi r16, r11, CC_R16
|
|
|
|
|
lwi r15, r11, CC_R15
|
|
|
|
|
lwi r14, r11, CC_R14
|
|
|
|
|
lwi r13, r11, CC_R13
|
|
|
|
|
/* skip volatile registers */
|
|
|
|
|
lwi r2, r11, CC_R2
|
|
|
|
|
lwi r1, r11, CC_R1
|
|
|
|
|
|
|
|
|
|
rtsd r15, 8
|
|
|
|
|
nop
|
|
|
|
|
|
|
|
|
|
ENTRY(ret_from_fork)
|
|
|
|
|
addk r5, r0, r3
|
|
|
|
|
brlid r15, schedule_tail
|
|
|
|
|
nop
|
|
|
|
|
swi r31, r1, PT_R31 /* save r31 in user context. */
|
|
|
|
|
/* will soon be restored to r31 in ret_to_user */
|
|
|
|
|
addk r3, r0, r0
|
|
|
|
|
brid ret_to_user
|
|
|
|
|
nop
|
|
|
|
|
|
2012-10-06 13:52:37 -04:00
|
|
|
ENTRY(ret_from_kernel_thread)
|
|
|
|
|
brlid r15, schedule_tail
|
|
|
|
|
addk r5, r0, r3
|
|
|
|
|
brald r15, r20
|
|
|
|
|
addk r5, r0, r19
|
2012-10-10 11:52:44 -04:00
|
|
|
brid ret_to_user
|
|
|
|
|
addk r3, r0, r0
|
2012-10-06 13:52:37 -04:00
|
|
|
|
2009-03-27 14:25:20 +01:00
|
|
|
work_pending:
|
2012-04-29 03:35:29 -04:00
|
|
|
lwi r11, r1, PT_MODE
|
|
|
|
|
bneid r11, 2f
|
2012-04-29 04:43:50 -04:00
|
|
|
3:
|
2010-04-27 13:00:23 -05:00
|
|
|
enable_irq
|
2009-03-27 14:25:20 +01:00
|
|
|
andi r11, r19, _TIF_NEED_RESCHED
|
|
|
|
|
beqi r11, 1f
|
|
|
|
|
bralid r15, schedule
|
|
|
|
|
nop
|
2012-04-29 04:43:50 -04:00
|
|
|
bri 4f
|
2012-04-24 02:03:06 -04:00
|
|
|
1: andi r11, r19, _TIF_SIGPENDING | _TIF_NOTIFY_RESUME
|
2009-03-27 14:25:20 +01:00
|
|
|
beqi r11, no_work_pending
|
2012-04-29 04:11:34 -04:00
|
|
|
addk r5, r30, r0
|
2012-04-24 02:03:06 -04:00
|
|
|
bralid r15, do_notify_resume
|
2012-04-24 02:21:18 -04:00
|
|
|
addik r6, r0, 1
|
2012-04-29 04:43:50 -04:00
|
|
|
addk r30, r0, r0 /* no restarts from now on */
|
|
|
|
|
4:
|
|
|
|
|
disable_irq
|
|
|
|
|
lwi r6, r31, TS_THREAD_INFO /* get thread info */
|
|
|
|
|
lwi r19, r6, TI_FLAGS /* get flags in thread info */
|
|
|
|
|
bri 3b
|
2009-03-27 14:25:20 +01:00
|
|
|
|
|
|
|
|
ENTRY(ret_to_user)
|
|
|
|
|
disable_irq
|
|
|
|
|
|
|
|
|
|
swi r4, r1, PT_R4 /* return val */
|
|
|
|
|
swi r3, r1, PT_R3 /* return val */
|
|
|
|
|
|
|
|
|
|
lwi r6, r31, TS_THREAD_INFO /* get thread info */
|
|
|
|
|
lwi r19, r6, TI_FLAGS /* get flags in thread info */
|
|
|
|
|
bnei r19, work_pending /* do an extra work if any bits are set */
|
|
|
|
|
no_work_pending:
|
|
|
|
|
disable_irq
|
|
|
|
|
|
2012-04-29 03:35:29 -04:00
|
|
|
2:
|
2009-03-27 14:25:20 +01:00
|
|
|
/* save r31 */
|
|
|
|
|
swi r31, r0, PER_CPU(CURRENT_SAVE)
|
|
|
|
|
/* save mode indicator */
|
|
|
|
|
lwi r18, r1, PT_MODE
|
|
|
|
|
swi r18, r0, PER_CPU(KM)
|
|
|
|
|
//restore_context:
|
|
|
|
|
/* special purpose registers */
|
|
|
|
|
lwi r18, r1, PT_FSR
|
|
|
|
|
mts rfsr, r18
|
|
|
|
|
lwi r18, r1, PT_ESR
|
|
|
|
|
mts resr, r18
|
|
|
|
|
lwi r18, r1, PT_EAR
|
|
|
|
|
mts rear, r18
|
|
|
|
|
lwi r18, r1, PT_MSR
|
|
|
|
|
mts rmsr, r18
|
|
|
|
|
|
|
|
|
|
lwi r31, r1, PT_R31
|
|
|
|
|
lwi r30, r1, PT_R30
|
|
|
|
|
lwi r29, r1, PT_R29
|
|
|
|
|
lwi r28, r1, PT_R28
|
|
|
|
|
lwi r27, r1, PT_R27
|
|
|
|
|
lwi r26, r1, PT_R26
|
|
|
|
|
lwi r25, r1, PT_R25
|
|
|
|
|
lwi r24, r1, PT_R24
|
|
|
|
|
lwi r23, r1, PT_R23
|
|
|
|
|
lwi r22, r1, PT_R22
|
|
|
|
|
lwi r21, r1, PT_R21
|
|
|
|
|
lwi r20, r1, PT_R20
|
|
|
|
|
lwi r19, r1, PT_R19
|
|
|
|
|
lwi r18, r1, PT_R18
|
|
|
|
|
lwi r17, r1, PT_R17
|
|
|
|
|
lwi r16, r1, PT_R16
|
|
|
|
|
lwi r15, r1, PT_R15
|
|
|
|
|
lwi r14, r1, PT_PC
|
|
|
|
|
lwi r13, r1, PT_R13
|
|
|
|
|
lwi r12, r1, PT_R12
|
|
|
|
|
lwi r11, r1, PT_R11
|
|
|
|
|
lwi r10, r1, PT_R10
|
|
|
|
|
lwi r9, r1, PT_R9
|
|
|
|
|
lwi r8, r1, PT_R8
|
|
|
|
|
lwi r7, r1, PT_R7
|
|
|
|
|
lwi r6, r1, PT_R6
|
|
|
|
|
lwi r5, r1, PT_R5
|
|
|
|
|
lwi r4, r1, PT_R4 /* return val */
|
|
|
|
|
lwi r3, r1, PT_R3 /* return val */
|
|
|
|
|
lwi r2, r1, PT_R2
|
|
|
|
|
lwi r1, r1, PT_R1
|
|
|
|
|
|
|
|
|
|
rtid r14, 0
|
|
|
|
|
nop
|
|
|
|
|
|
|
|
|
|
sys_rt_sigreturn_wrapper:
|
2012-04-29 04:11:34 -04:00
|
|
|
addk r30, r0, r0 /* no restarts for this one */
|
2009-03-27 14:25:20 +01:00
|
|
|
brid sys_rt_sigreturn
|
|
|
|
|
addk r5, r1, r0
|
|
|
|
|
|
|
|
|
|
/* Interrupt vector table */
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.section .init.ivt, "ax"
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.org 0x0
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brai _reset
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brai _user_exception
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brai _interrupt
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brai _break
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brai _hw_exception_handler
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.org 0x60
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brai _debug_exception
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.section .rodata,"a"
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#include "syscall_table.S"
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syscall_table_size=(.-sys_call_table)
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2010-04-27 12:37:54 -05:00
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type_SYSCALL:
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.ascii "SYSCALL\0"
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type_IRQ:
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.ascii "IRQ\0"
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type_IRQ_PREEMPT:
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.ascii "IRQ (PREEMPTED)\0"
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type_SYSCALL_PREEMPT:
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.ascii " SYSCALL (PREEMPTED)\0"
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/*
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* Trap decoding for stack unwinder
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* Tuples are (start addr, end addr, string)
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* If return address lies on [start addr, end addr],
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* unwinder displays 'string'
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*/
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.align 4
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.global microblaze_trap_handlers
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microblaze_trap_handlers:
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/* Exact matches come first */
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.word ret_to_user ; .word ret_to_user ; .word type_SYSCALL
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.word ret_from_intr; .word ret_from_intr ; .word type_IRQ
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/* Fuzzy matches go here */
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.word ret_from_intr; .word no_intr_resched; .word type_IRQ_PREEMPT
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.word work_pending ; .word no_work_pending; .word type_SYSCALL_PREEMPT
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/* End of table */
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.word 0 ; .word 0 ; .word 0
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