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											2008-05-09 16:18:33 +02:00
										 |  |  | /*
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							|  |  |  |  * dma_timer.c -- Freescale ColdFire DMA Timer. | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * Copyright (C) 2007, Benedikt Spranger <b.spranger@linutronix.de> | 
					
						
							|  |  |  |  * Copyright (C) 2008. Sebastian Siewior, Linutronix | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  */ | 
					
						
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							|  |  |  | #include <linux/clocksource.h>
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							|  |  |  | #include <linux/io.h>
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							|  |  |  | #include <asm/machdep.h>
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							|  |  |  | #include <asm/coldfire.h>
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							|  |  |  | #include <asm/mcfpit.h>
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							|  |  |  | #include <asm/mcfsim.h>
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							|  |  |  | #define DMA_TIMER_0	(0x00)
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							|  |  |  | #define DMA_TIMER_1	(0x40)
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							|  |  |  | #define DMA_TIMER_2	(0x80)
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							|  |  |  | #define DMA_TIMER_3	(0xc0)
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							|  |  |  | #define DTMR0	(MCF_IPSBAR + DMA_TIMER_0 + 0x400)
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							|  |  |  | #define DTXMR0	(MCF_IPSBAR + DMA_TIMER_0 + 0x402)
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							|  |  |  | #define DTER0	(MCF_IPSBAR + DMA_TIMER_0 + 0x403)
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							|  |  |  | #define DTRR0	(MCF_IPSBAR + DMA_TIMER_0 + 0x404)
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							|  |  |  | #define DTCR0	(MCF_IPSBAR + DMA_TIMER_0 + 0x408)
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							|  |  |  | #define DTCN0	(MCF_IPSBAR + DMA_TIMER_0 + 0x40c)
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							|  |  |  | #define DMA_FREQ    ((MCF_CLK / 2) / 16)
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							|  |  |  | /* DTMR */ | 
					
						
							|  |  |  | #define DMA_DTMR_RESTART	(1 << 3)
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							|  |  |  | #define DMA_DTMR_CLK_DIV_1	(1 << 1)
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							|  |  |  | #define DMA_DTMR_CLK_DIV_16	(2 << 1)
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							|  |  |  | #define DMA_DTMR_ENABLE		(1 << 0)
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											2009-04-21 12:24:00 -07:00
										 |  |  | static cycle_t cf_dt_get_cycles(struct clocksource *cs) | 
					
						
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										 |  |  | { | 
					
						
							|  |  |  | 	return __raw_readl(DTCN0); | 
					
						
							|  |  |  | } | 
					
						
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							|  |  |  | static struct clocksource clocksource_cf_dt = { | 
					
						
							|  |  |  | 	.name		= "coldfire_dma_timer", | 
					
						
							|  |  |  | 	.rating		= 200, | 
					
						
							|  |  |  | 	.read		= cf_dt_get_cycles, | 
					
						
							|  |  |  | 	.mask		= CLOCKSOURCE_MASK(32), | 
					
						
							|  |  |  | 	.flags		= CLOCK_SOURCE_IS_CONTINUOUS, | 
					
						
							|  |  |  | }; | 
					
						
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							|  |  |  | static int __init  init_cf_dt_clocksource(void) | 
					
						
							|  |  |  | { | 
					
						
							|  |  |  | 	/*
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							|  |  |  | 	 * We setup DMA timer 0 in free run mode. This incrementing counter is | 
					
						
							|  |  |  | 	 * used as a highly precious clock source. With MCF_CLOCK = 150 MHz we | 
					
						
							|  |  |  | 	 * get a ~213 ns resolution and the 32bit register will overflow almost | 
					
						
							|  |  |  | 	 * every 15 minutes. | 
					
						
							|  |  |  | 	 */ | 
					
						
							|  |  |  | 	__raw_writeb(0x00, DTXMR0); | 
					
						
							|  |  |  | 	__raw_writeb(0x00, DTER0); | 
					
						
							|  |  |  | 	__raw_writel(0x00000000, DTRR0); | 
					
						
							|  |  |  | 	__raw_writew(DMA_DTMR_CLK_DIV_16 | DMA_DTMR_ENABLE, DTMR0); | 
					
						
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										 |  |  | 	return clocksource_register_hz(&clocksource_cf_dt, DMA_FREQ); | 
					
						
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											2008-05-09 16:18:33 +02:00
										 |  |  | } | 
					
						
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							|  |  |  | arch_initcall(init_cf_dt_clocksource); | 
					
						
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											2008-04-28 11:43:03 +02:00
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							|  |  |  | #define CYC2NS_SCALE_FACTOR 10 /* 2^10, carefully chosen */
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							|  |  |  | #define CYC2NS_SCALE	((1000000 << CYC2NS_SCALE_FACTOR) / (DMA_FREQ / 1000))
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							|  |  |  | static unsigned long long cycles2ns(unsigned long cycl) | 
					
						
							|  |  |  | { | 
					
						
							|  |  |  | 	return (unsigned long long) ((unsigned long long)cycl * | 
					
						
							|  |  |  | 			CYC2NS_SCALE) >> CYC2NS_SCALE_FACTOR; | 
					
						
							|  |  |  | } | 
					
						
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							|  |  |  | unsigned long long sched_clock(void) | 
					
						
							|  |  |  | { | 
					
						
							|  |  |  | 	unsigned long cycl = __raw_readl(DTCN0); | 
					
						
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							|  |  |  | 	return cycles2ns(cycl); | 
					
						
							|  |  |  | } |