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										 |  |  | #ifndef MMSS_CC_XML
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							|  |  |  | #define MMSS_CC_XML
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							|  |  |  | /* Autogenerated file, DO NOT EDIT manually!
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							|  |  |  | This file was generated by the rules-ng-ng headergen tool in this git repository: | 
					
						
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											2013-10-07 12:42:27 -04:00
										 |  |  | http://github.com/freedreno/envytools/
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							|  |  |  | git clone https://github.com/freedreno/envytools.git
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							|  |  |  | The rules-ng-ng source files this header was generated from are: | 
					
						
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											2013-11-30 12:45:48 -05:00
										 |  |  | - /home/robclark/src/freedreno/envytools/rnndb/msm.xml                 (    647 bytes, from 2013-11-30 14:45:35) | 
					
						
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										 |  |  | - /home/robclark/src/freedreno/envytools/rnndb/freedreno_copyright.xml (   1453 bytes, from 2013-03-31 16:51:27) | 
					
						
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											2014-08-01 08:26:56 -04:00
										 |  |  | - /home/robclark/src/freedreno/envytools/rnndb/mdp/mdp4.xml            (  20457 bytes, from 2014-08-01 12:22:48) | 
					
						
							|  |  |  | - /home/robclark/src/freedreno/envytools/rnndb/mdp/mdp_common.xml      (   1615 bytes, from 2014-07-17 15:34:33) | 
					
						
							|  |  |  | - /home/robclark/src/freedreno/envytools/rnndb/mdp/mdp5.xml            (  22517 bytes, from 2014-07-17 15:34:33) | 
					
						
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											2013-06-24 17:12:04 -04:00
										 |  |  | - /home/robclark/src/freedreno/envytools/rnndb/dsi/dsi.xml             (  11712 bytes, from 2013-08-17 17:13:43) | 
					
						
							|  |  |  | - /home/robclark/src/freedreno/envytools/rnndb/dsi/sfpb.xml            (    344 bytes, from 2013-08-11 19:26:32) | 
					
						
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											2014-08-01 08:26:56 -04:00
										 |  |  | - /home/robclark/src/freedreno/envytools/rnndb/dsi/mmss_cc.xml         (   1686 bytes, from 2014-08-01 12:23:53) | 
					
						
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											2013-06-24 17:12:04 -04:00
										 |  |  | - /home/robclark/src/freedreno/envytools/rnndb/hdmi/qfprom.xml         (    600 bytes, from 2013-07-05 19:21:12) | 
					
						
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											2014-08-01 08:26:56 -04:00
										 |  |  | - /home/robclark/src/freedreno/envytools/rnndb/hdmi/hdmi.xml           (  23613 bytes, from 2014-07-17 15:33:30) | 
					
						
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										 |  |  | Copyright (C) 2013-2014 by the following authors: | 
					
						
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										 |  |  | - Rob Clark <robdclark@gmail.com> (robclark) | 
					
						
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							|  |  |  | Permission is hereby granted, free of charge, to any person obtaining | 
					
						
							|  |  |  | a copy of this software and associated documentation files (the | 
					
						
							|  |  |  | "Software"), to deal in the Software without restriction, including | 
					
						
							|  |  |  | without limitation the rights to use, copy, modify, merge, publish, | 
					
						
							|  |  |  | distribute, sublicense, and/or sell copies of the Software, and to | 
					
						
							|  |  |  | permit persons to whom the Software is furnished to do so, subject to | 
					
						
							|  |  |  | the following conditions: | 
					
						
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							|  |  |  | The above copyright notice and this permission notice (including the | 
					
						
							|  |  |  | next paragraph) shall be included in all copies or substantial | 
					
						
							|  |  |  | portions of the Software. | 
					
						
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							|  |  |  | THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | 
					
						
							|  |  |  | EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | 
					
						
							|  |  |  | MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. | 
					
						
							|  |  |  | IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE | 
					
						
							|  |  |  | LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION | 
					
						
							|  |  |  | OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION | 
					
						
							|  |  |  | WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. | 
					
						
							|  |  |  | */ | 
					
						
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							|  |  |  | enum mmss_cc_clk { | 
					
						
							|  |  |  | 	CLK = 0, | 
					
						
							|  |  |  | 	PCLK = 1, | 
					
						
							|  |  |  | }; | 
					
						
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							|  |  |  | #define REG_MMSS_CC_AHB						0x00000008
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							|  |  |  | static inline uint32_t __offset_CLK(enum mmss_cc_clk idx) | 
					
						
							|  |  |  | { | 
					
						
							|  |  |  | 	switch (idx) { | 
					
						
							|  |  |  | 		case CLK: return 0x0000004c; | 
					
						
							|  |  |  | 		case PCLK: return 0x00000130; | 
					
						
							|  |  |  | 		default: return INVALID_IDX(idx); | 
					
						
							|  |  |  | 	} | 
					
						
							|  |  |  | } | 
					
						
							|  |  |  | static inline uint32_t REG_MMSS_CC_CLK(enum mmss_cc_clk i0) { return 0x00000000 + __offset_CLK(i0); } | 
					
						
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							|  |  |  | static inline uint32_t REG_MMSS_CC_CLK_CC(enum mmss_cc_clk i0) { return 0x00000000 + __offset_CLK(i0); } | 
					
						
							|  |  |  | #define MMSS_CC_CLK_CC_CLK_EN					0x00000001
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							|  |  |  | #define MMSS_CC_CLK_CC_ROOT_EN					0x00000004
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							|  |  |  | #define MMSS_CC_CLK_CC_MND_EN					0x00000020
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							|  |  |  | #define MMSS_CC_CLK_CC_MND_MODE__MASK				0x000000c0
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							|  |  |  | #define MMSS_CC_CLK_CC_MND_MODE__SHIFT				6
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							|  |  |  | static inline uint32_t MMSS_CC_CLK_CC_MND_MODE(uint32_t val) | 
					
						
							|  |  |  | { | 
					
						
							|  |  |  | 	return ((val) << MMSS_CC_CLK_CC_MND_MODE__SHIFT) & MMSS_CC_CLK_CC_MND_MODE__MASK; | 
					
						
							|  |  |  | } | 
					
						
							|  |  |  | #define MMSS_CC_CLK_CC_PMXO_SEL__MASK				0x00000300
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							|  |  |  | #define MMSS_CC_CLK_CC_PMXO_SEL__SHIFT				8
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							|  |  |  | static inline uint32_t MMSS_CC_CLK_CC_PMXO_SEL(uint32_t val) | 
					
						
							|  |  |  | { | 
					
						
							|  |  |  | 	return ((val) << MMSS_CC_CLK_CC_PMXO_SEL__SHIFT) & MMSS_CC_CLK_CC_PMXO_SEL__MASK; | 
					
						
							|  |  |  | } | 
					
						
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							|  |  |  | static inline uint32_t REG_MMSS_CC_CLK_MD(enum mmss_cc_clk i0) { return 0x00000004 + __offset_CLK(i0); } | 
					
						
							|  |  |  | #define MMSS_CC_CLK_MD_D__MASK					0x000000ff
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							|  |  |  | #define MMSS_CC_CLK_MD_D__SHIFT					0
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							|  |  |  | static inline uint32_t MMSS_CC_CLK_MD_D(uint32_t val) | 
					
						
							|  |  |  | { | 
					
						
							|  |  |  | 	return ((val) << MMSS_CC_CLK_MD_D__SHIFT) & MMSS_CC_CLK_MD_D__MASK; | 
					
						
							|  |  |  | } | 
					
						
							|  |  |  | #define MMSS_CC_CLK_MD_M__MASK					0x0000ff00
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							|  |  |  | #define MMSS_CC_CLK_MD_M__SHIFT					8
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							|  |  |  | static inline uint32_t MMSS_CC_CLK_MD_M(uint32_t val) | 
					
						
							|  |  |  | { | 
					
						
							|  |  |  | 	return ((val) << MMSS_CC_CLK_MD_M__SHIFT) & MMSS_CC_CLK_MD_M__MASK; | 
					
						
							|  |  |  | } | 
					
						
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							|  |  |  | static inline uint32_t REG_MMSS_CC_CLK_NS(enum mmss_cc_clk i0) { return 0x00000008 + __offset_CLK(i0); } | 
					
						
							|  |  |  | #define MMSS_CC_CLK_NS_SRC__MASK				0x0000000f
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							|  |  |  | #define MMSS_CC_CLK_NS_SRC__SHIFT				0
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							|  |  |  | static inline uint32_t MMSS_CC_CLK_NS_SRC(uint32_t val) | 
					
						
							|  |  |  | { | 
					
						
							|  |  |  | 	return ((val) << MMSS_CC_CLK_NS_SRC__SHIFT) & MMSS_CC_CLK_NS_SRC__MASK; | 
					
						
							|  |  |  | } | 
					
						
							|  |  |  | #define MMSS_CC_CLK_NS_PRE_DIV_FUNC__MASK			0x00fff000
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							|  |  |  | #define MMSS_CC_CLK_NS_PRE_DIV_FUNC__SHIFT			12
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							|  |  |  | static inline uint32_t MMSS_CC_CLK_NS_PRE_DIV_FUNC(uint32_t val) | 
					
						
							|  |  |  | { | 
					
						
							|  |  |  | 	return ((val) << MMSS_CC_CLK_NS_PRE_DIV_FUNC__SHIFT) & MMSS_CC_CLK_NS_PRE_DIV_FUNC__MASK; | 
					
						
							|  |  |  | } | 
					
						
							|  |  |  | #define MMSS_CC_CLK_NS_VAL__MASK				0xff000000
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							|  |  |  | #define MMSS_CC_CLK_NS_VAL__SHIFT				24
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							|  |  |  | static inline uint32_t MMSS_CC_CLK_NS_VAL(uint32_t val) | 
					
						
							|  |  |  | { | 
					
						
							|  |  |  | 	return ((val) << MMSS_CC_CLK_NS_VAL__SHIFT) & MMSS_CC_CLK_NS_VAL__MASK; | 
					
						
							|  |  |  | } | 
					
						
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										 |  |  | #define REG_MMSS_CC_DSI2_PIXEL_CC				0x00000094
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							|  |  |  | #define REG_MMSS_CC_DSI2_PIXEL_NS				0x000000e4
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							|  |  |  | #define REG_MMSS_CC_DSI2_PIXEL_CC2				0x00000264
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							|  |  |  | #endif /* MMSS_CC_XML */
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