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											2012-11-29 20:39:54 +01:00
										 |  |  | /*
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							|  |  |  |  * Copyright 2012 Calxeda, Inc. | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * This program is free software; you can redistribute it and/or modify it | 
					
						
							|  |  |  |  * under the terms and conditions of the GNU General Public License, | 
					
						
							|  |  |  |  * version 2, as published by the Free Software Foundation. | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * This program is distributed in the hope it will be useful, but WITHOUT | 
					
						
							|  |  |  |  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | 
					
						
							|  |  |  |  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for | 
					
						
							|  |  |  |  * more details. | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * You should have received a copy of the GNU General Public License along with | 
					
						
							|  |  |  |  * this program.  If not, see <http://www.gnu.org/licenses/>.
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							|  |  |  |  */ | 
					
						
							|  |  |  | #ifndef _ASM_ARM_PERCPU_H_
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							|  |  |  | #define _ASM_ARM_PERCPU_H_
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							|  |  |  | /*
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							|  |  |  |  * Same as asm-generic/percpu.h, except that we store the per cpu offset | 
					
						
							|  |  |  |  * in the TPIDRPRW. TPIDRPRW only exists on V6K and V7 | 
					
						
							|  |  |  |  */ | 
					
						
							|  |  |  | #if defined(CONFIG_SMP) && !defined(CONFIG_CPU_V6)
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							|  |  |  | static inline void set_my_cpu_offset(unsigned long off) | 
					
						
							|  |  |  | { | 
					
						
							|  |  |  | 	/* Set TPIDRPRW */ | 
					
						
							|  |  |  | 	asm volatile("mcr p15, 0, %0, c13, c0, 4" : : "r" (off) : "memory"); | 
					
						
							|  |  |  | } | 
					
						
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							|  |  |  | static inline unsigned long __my_cpu_offset(void) | 
					
						
							|  |  |  | { | 
					
						
							|  |  |  | 	unsigned long off; | 
					
						
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										 |  |  | 	register unsigned long *sp asm ("sp"); | 
					
						
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							|  |  |  | 	/*
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							|  |  |  | 	 * Read TPIDRPRW. | 
					
						
							|  |  |  | 	 * We want to allow caching the value, so avoid using volatile and | 
					
						
							|  |  |  | 	 * instead use a fake stack read to hazard against barrier(). | 
					
						
							|  |  |  | 	 */ | 
					
						
							|  |  |  | 	asm("mrc p15, 0, %0, c13, c0, 4" : "=r" (off) : "Q" (*sp)); | 
					
						
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											2012-11-29 20:39:54 +01:00
										 |  |  | 	return off; | 
					
						
							|  |  |  | } | 
					
						
							|  |  |  | #define __my_cpu_offset __my_cpu_offset()
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							|  |  |  | #else
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							|  |  |  | #define set_my_cpu_offset(x)	do {} while(0)
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							|  |  |  | #endif /* CONFIG_SMP */
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							|  |  |  | #include <asm-generic/percpu.h>
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							|  |  |  | #endif /* _ASM_ARM_PERCPU_H_ */
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