2015-05-06 01:09:50 +02:00
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/* net/dsa/mv88e6171.c - Marvell 88e6171 switch chip support
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2014-09-12 23:58:44 +02:00
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* Copyright (c) 2008-2009 Marvell Semiconductor
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* Copyright (c) 2014 Claudio Leite <leitec@staticky.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <linux/delay.h>
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#include <linux/jiffies.h>
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#include <linux/list.h>
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#include <linux/module.h>
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#include <linux/netdevice.h>
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#include <linux/phy.h>
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#include <net/dsa.h>
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#include "mv88e6xxx.h"
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2016-04-17 13:23:59 -04:00
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static const struct mv88e6xxx_info mv88e6171_table[] = {
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{
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.prod_num = PORT_SWITCH_ID_PROD_NUM_6171,
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.family = MV88E6XXX_FAMILY_6351,
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2016-04-17 13:23:59 -04:00
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.name = "Marvell 88E6171",
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2016-04-17 13:24:01 -04:00
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.num_ports = 7,
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}, {
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.prod_num = PORT_SWITCH_ID_PROD_NUM_6175,
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2016-04-17 13:24:00 -04:00
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.family = MV88E6XXX_FAMILY_6351,
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2016-04-17 13:23:59 -04:00
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.name = "Marvell 88E6175",
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.num_ports = 7,
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}, {
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.prod_num = PORT_SWITCH_ID_PROD_NUM_6350,
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.family = MV88E6XXX_FAMILY_6351,
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.name = "Marvell 88E6350",
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.num_ports = 7,
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2016-04-17 13:23:59 -04:00
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}, {
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.prod_num = PORT_SWITCH_ID_PROD_NUM_6351,
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2016-04-17 13:24:00 -04:00
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.family = MV88E6XXX_FAMILY_6351,
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.name = "Marvell 88E6351",
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.num_ports = 7,
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2016-04-17 13:23:59 -04:00
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}
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2015-10-30 19:39:48 -04:00
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};
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2016-04-17 13:23:55 -04:00
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static const char *mv88e6171_drv_probe(struct device *dsa_dev,
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struct device *host_dev, int sw_addr,
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void **priv)
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2014-09-12 23:58:44 +02:00
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{
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2016-04-13 02:40:42 +02:00
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return mv88e6xxx_drv_probe(dsa_dev, host_dev, sw_addr, priv,
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mv88e6171_table,
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ARRAY_SIZE(mv88e6171_table));
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2014-09-12 23:58:44 +02:00
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}
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static int mv88e6171_setup_global(struct dsa_switch *ds)
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{
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2015-05-06 01:09:49 +02:00
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u32 upstream_port = dsa_upstream_port(ds);
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2014-09-12 23:58:44 +02:00
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int ret;
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2015-05-06 01:09:50 +02:00
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u32 reg;
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2015-05-06 01:09:47 +02:00
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ret = mv88e6xxx_setup_global(ds);
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if (ret)
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return ret;
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2014-09-12 23:58:44 +02:00
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2015-02-14 19:17:51 +01:00
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/* Discard packets with excessive collisions, mask all
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* interrupt sources, enable PPU.
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2014-09-12 23:58:44 +02:00
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*/
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2016-04-14 23:47:12 +02:00
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ret = mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_CONTROL,
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GLOBAL_CONTROL_PPU_ENABLE |
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GLOBAL_CONTROL_DISCARD_EXCESS);
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if (ret)
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return ret;
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2014-09-12 23:58:44 +02:00
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/* Configure the upstream port, and configure the upstream
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* port as the port to which ingress and egress monitor frames
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* are to be sent.
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*/
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2015-05-06 01:09:50 +02:00
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reg = upstream_port << GLOBAL_MONITOR_CONTROL_INGRESS_SHIFT |
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upstream_port << GLOBAL_MONITOR_CONTROL_EGRESS_SHIFT |
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upstream_port << GLOBAL_MONITOR_CONTROL_ARP_SHIFT |
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upstream_port << GLOBAL_MONITOR_CONTROL_MIRROR_SHIFT;
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2016-04-14 23:47:12 +02:00
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ret = mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_MONITOR_CONTROL, reg);
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if (ret)
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return ret;
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2014-09-12 23:58:44 +02:00
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/* Disable remote management for now, and set the switch's
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* DSA device number.
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*/
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2016-04-14 23:47:12 +02:00
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return mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_CONTROL_2,
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ds->index & 0x1f);
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2014-09-12 23:58:44 +02:00
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}
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static int mv88e6171_setup(struct dsa_switch *ds)
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{
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int ret;
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2015-03-26 18:36:28 -07:00
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ret = mv88e6xxx_setup_common(ds);
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if (ret < 0)
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return ret;
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2014-09-12 23:58:44 +02:00
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2015-04-02 04:06:34 +02:00
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ret = mv88e6xxx_switch_reset(ds, true);
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2014-09-12 23:58:44 +02:00
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if (ret < 0)
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return ret;
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ret = mv88e6171_setup_global(ds);
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if (ret < 0)
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return ret;
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2015-05-06 01:09:48 +02:00
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return mv88e6xxx_setup_ports(ds);
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2014-09-12 23:58:44 +02:00
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}
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struct dsa_switch_driver mv88e6171_switch_driver = {
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2014-10-24 23:44:05 +02:00
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.tag_protocol = DSA_TAG_PROTO_EDSA,
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2016-04-13 02:40:43 +02:00
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.probe = mv88e6171_drv_probe,
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2014-09-12 23:58:44 +02:00
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.setup = mv88e6171_setup,
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.set_addr = mv88e6xxx_set_addr_indirect,
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2015-04-02 04:06:36 +02:00
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.phy_read = mv88e6xxx_phy_read_indirect,
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.phy_write = mv88e6xxx_phy_write_indirect,
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2015-04-02 04:06:38 +02:00
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.get_strings = mv88e6xxx_get_strings,
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.get_ethtool_stats = mv88e6xxx_get_ethtool_stats,
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.get_sset_count = mv88e6xxx_get_sset_count,
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2015-08-31 15:56:47 +02:00
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.adjust_link = mv88e6xxx_adjust_link,
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2014-11-15 22:24:52 +01:00
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#ifdef CONFIG_NET_DSA_HWMON
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.get_temp = mv88e6xxx_get_temp,
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#endif
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2014-11-15 22:24:53 +01:00
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.get_regs_len = mv88e6xxx_get_regs_len,
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.get_regs = mv88e6xxx_get_regs,
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2016-03-13 16:21:32 -04:00
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.port_bridge_join = mv88e6xxx_port_bridge_join,
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.port_bridge_leave = mv88e6xxx_port_bridge_leave,
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2016-04-06 11:55:03 -04:00
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.port_stp_state_set = mv88e6xxx_port_stp_state_set,
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2016-02-26 13:16:08 -05:00
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.port_vlan_filtering = mv88e6xxx_port_vlan_filtering,
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2015-11-01 12:33:55 -05:00
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.port_vlan_prepare = mv88e6xxx_port_vlan_prepare,
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2015-09-04 11:22:24 -04:00
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.port_vlan_add = mv88e6xxx_port_vlan_add,
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.port_vlan_del = mv88e6xxx_port_vlan_del,
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2016-02-23 12:13:55 -05:00
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.port_vlan_dump = mv88e6xxx_port_vlan_dump,
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2015-10-08 11:35:12 -04:00
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.port_fdb_prepare = mv88e6xxx_port_fdb_prepare,
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2015-08-10 09:09:49 -04:00
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.port_fdb_add = mv88e6xxx_port_fdb_add,
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.port_fdb_del = mv88e6xxx_port_fdb_del,
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2015-10-22 09:34:41 -04:00
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.port_fdb_dump = mv88e6xxx_port_fdb_dump,
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2014-09-12 23:58:44 +02:00
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};
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MODULE_ALIAS("platform:mv88e6171");
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2015-05-06 01:09:51 +02:00
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MODULE_ALIAS("platform:mv88e6175");
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MODULE_ALIAS("platform:mv88e6350");
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MODULE_ALIAS("platform:mv88e6351");
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