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										 |  |  | #ifndef __ASM_SH_RENESAS_RTS7751R2D_H
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							|  |  |  | #define __ASM_SH_RENESAS_RTS7751R2D_H
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							|  |  |  | /*
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							|  |  |  |  * linux/include/asm-sh/renesas_rts7751r2d.h | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * Copyright (C) 2000  Atom Create Engineering Co., Ltd. | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * Renesas Technology Sales RTS7751R2D support | 
					
						
							|  |  |  |  */ | 
					
						
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										 |  |  | /* Board specific addresses.  */ | 
					
						
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							|  |  |  | #define PA_BCR		0xa4000000	/* FPGA */
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							|  |  |  | #define PA_IRLMON	0xa4000002	/* Interrupt Status control */
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							|  |  |  | #define PA_CFCTL	0xa4000004	/* CF Timing control */
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							|  |  |  | #define PA_CFPOW	0xa4000006	/* CF Power control */
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							|  |  |  | #define PA_DISPCTL	0xa4000008	/* Display Timing control */
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							|  |  |  | #define PA_SDMPOW	0xa400000a	/* SD Power control */
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							|  |  |  | #define PA_RTCCE	0xa400000c	/* RTC(9701) Enable control */
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							|  |  |  | #define PA_PCICD	0xa400000e	/* PCI Extention detect control */
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							|  |  |  | #define PA_VOYAGERRTS	0xa4000020	/* VOYAGER Reset control */
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							|  |  |  | #define PA_R2D1_AXRST		0xa4000022	/* AX_LAN Reset control */
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							|  |  |  | #define PA_R2D1_CFRST		0xa4000024	/* CF Reset control */
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							|  |  |  | #define PA_R2D1_ADMRTS		0xa4000026	/* SD Reset control */
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							|  |  |  | #define PA_R2D1_EXTRST		0xa4000028	/* Extention Reset control */
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							|  |  |  | #define PA_R2D1_CFCDINTCLR	0xa400002a	/* CF Insert Interrupt clear */
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							|  |  |  | #define PA_R2DPLUS_CFRST	0xa4000022	/* CF Reset control */
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							|  |  |  | #define PA_R2DPLUS_ADMRTS	0xa4000024	/* SD Reset control */
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							|  |  |  | #define PA_R2DPLUS_EXTRST	0xa4000026	/* Extention Reset control */
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							|  |  |  | #define PA_R2DPLUS_CFCDINTCLR	0xa4000028	/* CF Insert Interrupt clear */
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							|  |  |  | #define PA_R2DPLUS_KEYCTLCLR	0xa400002a	/* Key Interrupt clear */
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										 |  |  | #define PA_POWOFF	0xa4000030	/* Board Power OFF control */
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							|  |  |  | #define PA_VERREG	0xa4000032	/* FPGA Version Register */
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							|  |  |  | #define PA_INPORT	0xa4000034	/* KEY Input Port control */
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							|  |  |  | #define PA_OUTPORT	0xa4000036	/* LED control */
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										 |  |  | #define PA_BVERREG	0xa4000038	/* Board Revision Register */
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							|  |  |  | #define PA_AX88796L	0xaa000400	/* AX88796L Area */
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							|  |  |  | #define PA_VOYAGER	0xab000000	/* VOYAGER GX Area */
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							|  |  |  | #define PA_IDE_OFFSET	0x1f0		/* CF IDE Offset */
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							|  |  |  | #define AX88796L_IO_BASE	0x1000	/* AX88796L IO Base Address */
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							|  |  |  | #define IRLCNTR1	(PA_BCR + 0)	/* Interrupt Control Register1 */
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										 |  |  | #define R2D_FPGA_IRQ_BASE	100
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							|  |  |  | #define IRQ_VOYAGER		(R2D_FPGA_IRQ_BASE + 0)
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							|  |  |  | #define IRQ_EXT			(R2D_FPGA_IRQ_BASE + 1)
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							|  |  |  | #define IRQ_TP			(R2D_FPGA_IRQ_BASE + 2)
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							|  |  |  | #define IRQ_RTC_T		(R2D_FPGA_IRQ_BASE + 3)
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							|  |  |  | #define IRQ_RTC_A		(R2D_FPGA_IRQ_BASE + 4)
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							|  |  |  | #define IRQ_SDCARD		(R2D_FPGA_IRQ_BASE + 5)
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							|  |  |  | #define IRQ_CF_CD		(R2D_FPGA_IRQ_BASE + 6)
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							|  |  |  | #define IRQ_CF_IDE		(R2D_FPGA_IRQ_BASE + 7)
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							|  |  |  | #define IRQ_AX88796		(R2D_FPGA_IRQ_BASE + 8)
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							|  |  |  | #define IRQ_KEY			(R2D_FPGA_IRQ_BASE + 9)
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							|  |  |  | #define IRQ_PCI_INTA		(R2D_FPGA_IRQ_BASE + 10)
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							|  |  |  | #define IRQ_PCI_INTB		(R2D_FPGA_IRQ_BASE + 11)
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							|  |  |  | #define IRQ_PCI_INTC		(R2D_FPGA_IRQ_BASE + 12)
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							|  |  |  | #define IRQ_PCI_INTD		(R2D_FPGA_IRQ_BASE + 13)
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										 |  |  | /* arch/sh/boards/renesas/rts7751r2d/irq.c */ | 
					
						
							|  |  |  | void init_rts7751r2d_IRQ(void); | 
					
						
							|  |  |  | int rts7751r2d_irq_demux(int); | 
					
						
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										 |  |  | #endif  /* __ASM_SH_RENESAS_RTS7751R2D */
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