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linux-pinenote/arch/mips/include/asm/mach-emma2rh/irq.h

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[MIPS] Support for the R5500-based NEC EMMA2RH Mark-eins board Signed-off-by: dmitry pervushin <dpervushin@ru.mvista.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-05-21 14:53:06 +04:00
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 2003 by Ralf Baechle
*/
#ifndef __ASM_MACH_EMMA2RH_IRQ_H
#define __ASM_MACH_EMMA2RH_IRQ_H
#define NR_IRQS 256
[MIPS] Define MIPS_CPU_IRQ_BASE in generic header The irq_base for {mips,rm7k,rm9k}_cpu_irq_init() are constant on all platforms and are same value on most platforms (0 or 16, depends on CONFIG_I8259). Define them in asm-mips/mach-generic/irq.h and make them customizable. This will save a few cycle on each CPU interrupt. A good side effect is removing some dependencies to MALTA in generic SMTC code. Although MIPS_CPU_IRQ_BASE is customizable, this patch changes irq mappings on DDB5477, EMMA2RH and MIPS_SIM, since really customizing them might cause some header dependency problem and there seems no good reason to customize it. So currently only VR41XX is using custom MIPS_CPU_IRQ_BASE value, which is 0 regardless of CONFIG_I8259. Testing this patch on those platforms is greatly appreciated. Thank you. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-01-08 02:14:29 +09:00
#include_next <irq.h>
[MIPS] Support for the R5500-based NEC EMMA2RH Mark-eins board Signed-off-by: dmitry pervushin <dpervushin@ru.mvista.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-05-21 14:53:06 +04:00
#endif /* __ASM_MACH_EMMA2RH_IRQ_H */
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