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Fix PCB thickness; add initial case design for lite version

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Wenting Zhang 2024-01-09 20:38:11 -05:00
parent 266674c41d
commit cde330abc4
2 changed files with 2 additions and 2 deletions
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case/case.FCStd Normal file
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4
pcb/mainboard_lite/pcb.kicad_pcb
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@ -1,7 +1,7 @@
(kicad_pcb (version 20221018) (generator pcbnew) (kicad_pcb (version 20221018) (generator pcbnew)
(general (general
(thickness 1.61) (thickness 1.01)
) )
(paper "A4") (paper "A4")
@ -47,7 +47,7 @@
(layer "F.Cu" (type "copper") (thickness 0.035)) (layer "F.Cu" (type "copper") (thickness 0.035))
(layer "dielectric 1" (type "prepreg") (thickness 0.1) (material "FR4") (epsilon_r 4.5) (loss_tangent 0.02)) (layer "dielectric 1" (type "prepreg") (thickness 0.1) (material "FR4") (epsilon_r 4.5) (loss_tangent 0.02))
(layer "In1.Cu" (type "copper") (thickness 0.035)) (layer "In1.Cu" (type "copper") (thickness 0.035))
(layer "dielectric 2" (type "core") (thickness 1.25) (material "FR4") (epsilon_r 4.5) (loss_tangent 0.02)) (layer "dielectric 2" (type "core") (thickness 0.65) (material "FR4") (epsilon_r 4.5) (loss_tangent 0.02))
(layer "In2.Cu" (type "copper") (thickness 0.035)) (layer "In2.Cu" (type "copper") (thickness 0.035))
(layer "dielectric 3" (type "prepreg") (thickness 0.1) (material "FR4") (epsilon_r 4.5) (loss_tangent 0.02)) (layer "dielectric 3" (type "prepreg") (thickness 0.1) (material "FR4") (epsilon_r 4.5) (loss_tangent 0.02))
(layer "B.Cu" (type "copper") (thickness 0.035)) (layer "B.Cu" (type "copper") (thickness 0.035))