mirror of
https://gitlab.com/zephray/glider.git
synced 2024-11-10 11:17:54 +00:00
Rename old 39p adapter to 39p-a; Add 39p-c adapter
This commit is contained in:
Wenting Zhang
parent
ab953c42d8
commit
b41516dd23
13 changed files with 22561 additions and 7042 deletions
4558
pcb/39p-adapter-a/adapter.kicad_pcb
Normal file
4558
pcb/39p-adapter-a/adapter.kicad_pcb
Normal file
File diff suppressed because it is too large
Load diff
|
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@ -1,12 +1,14 @@
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|||
{
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||||
"board": {
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||||
"active_layer": 31,
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||||
"active_layer": 37,
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||||
"active_layer_preset": "",
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||||
"auto_track_width": true,
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||||
"hidden_netclasses": [],
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||||
"hidden_nets": [],
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||||
"high_contrast_mode": 0,
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||||
"net_color_mode": 1,
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||||
"opacity": {
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||||
"images": 0.6,
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||||
"pads": 1.0,
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||||
"tracks": 1.0,
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||||
"vias": 1.0,
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||||
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@ -15,13 +17,13 @@
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|||
"ratsnest_display_mode": 0,
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||||
"selection_filter": {
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||||
"dimensions": false,
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||||
"footprints": false,
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||||
"footprints": true,
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||||
"graphics": false,
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||||
"keepouts": false,
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||||
"lockedItems": true,
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||||
"otherItems": false,
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||||
"pads": false,
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||||
"text": false,
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||||
"text": true,
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||||
"tracks": true,
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||||
"vias": true,
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"zones": false
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||||
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@ -65,6 +67,12 @@
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|||
"visible_layers": "00090a0_80000001",
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||||
"zone_display_mode": 0
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||||
},
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||||
"git": {
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||||
"repo_password": "",
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||||
"repo_type": "",
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||||
"repo_username": "",
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||||
"ssh_key": ""
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||||
},
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||||
"meta": {
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||||
"filename": "adapter.kicad_prl",
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"version": 3
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@ -1,5 +1,6 @@
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{
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||||
"board": {
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||||
"3dviewports": [],
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||||
"design_settings": {
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||||
"defaults": {
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||||
"board_outline_line_width": 0.09999999999999999,
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||||
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@ -141,7 +142,15 @@
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|||
"zones_allow_external_fillets": false,
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||||
"zones_use_no_outline": true
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||||
},
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||||
"layer_presets": []
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||||
"ipc2581": {
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||||
"dist": "",
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||||
"distpn": "",
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||||
"internal_id": "",
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||||
"mfg": "",
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||||
"mpn": ""
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||||
},
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||||
"layer_presets": [],
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||||
"viewports": []
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},
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"boards": [],
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"cvpcb": {
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@ -328,15 +337,21 @@
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"bus_label_syntax": "error",
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"bus_to_bus_conflict": "error",
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"bus_to_net_conflict": "error",
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"conflicting_netclasses": "error",
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"different_unit_footprint": "error",
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"different_unit_net": "error",
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"duplicate_reference": "error",
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"duplicate_sheet_names": "error",
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"endpoint_off_grid": "warning",
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"extra_units": "error",
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"global_label_dangling": "warning",
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"hier_label_mismatch": "error",
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"label_dangling": "error",
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"lib_symbol_issues": "warning",
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"missing_bidi_pin": "warning",
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"missing_input_pin": "warning",
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"missing_power_pin": "error",
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"missing_unit": "warning",
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"multiple_net_names": "warning",
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"net_not_bus_member": "warning",
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"no_connect_connected": "warning",
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@ -346,6 +361,7 @@
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"pin_to_pin": "warning",
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"power_pin_not_driven": "error",
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"similar_labels": "warning",
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"simulation_model_issue": "ignore",
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"unannotated": "error",
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"unit_value_mismatch": "error",
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"unresolved_variable": "error",
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@ -363,7 +379,7 @@
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"net_settings": {
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"classes": [
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{
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"bus_width": 12.0,
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"bus_width": 12,
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"clearance": 0.1524,
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"diff_pair_gap": 0.25,
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"diff_pair_via_gap": 0.25,
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@ -377,28 +393,93 @@
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"track_width": 0.1524,
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"via_diameter": 0.65,
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"via_drill": 0.3,
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"wire_width": 6.0
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"wire_width": 6
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}
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],
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"meta": {
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"version": 2
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"version": 3
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},
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"net_colors": null
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||||
"net_colors": null,
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"netclass_assignments": null,
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"netclass_patterns": []
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},
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"pcbnew": {
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"last_paths": {
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"gencad": "",
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"idf": "",
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"netlist": "",
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"plot": "",
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"pos_files": "",
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"specctra_dsn": "",
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"step": "",
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"svg": "",
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"vrml": ""
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},
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"page_layout_descr_file": ""
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},
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"schematic": {
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"annotate_start_num": 0,
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"bom_fmt_presets": [],
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"bom_fmt_settings": {
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"field_delimiter": ",",
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"keep_line_breaks": false,
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"keep_tabs": false,
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"name": "CSV",
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"ref_delimiter": ",",
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"ref_range_delimiter": "",
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"string_delimiter": "\""
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},
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"bom_presets": [],
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"bom_settings": {
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"exclude_dnp": false,
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"fields_ordered": [
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{
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"group_by": false,
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"label": "Reference",
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"name": "Reference",
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"show": true
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},
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{
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"group_by": true,
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"label": "Value",
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"name": "Value",
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"show": true
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},
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{
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"group_by": false,
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"label": "Datasheet",
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"name": "Datasheet",
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"show": true
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},
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{
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"group_by": false,
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"label": "Footprint",
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"name": "Footprint",
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"show": true
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},
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{
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"group_by": false,
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"label": "Qty",
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"name": "${QUANTITY}",
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"show": true
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},
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{
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"group_by": true,
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"label": "DNP",
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"name": "${DNP}",
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"show": true
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}
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],
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"filter_string": "",
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"group_symbols": true,
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"name": "Grouped By Value",
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"sort_asc": true,
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"sort_field": "Reference"
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},
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"connection_grid_size": 50.0,
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"drawing": {
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"dashed_lines_dash_length_ratio": 12.0,
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"dashed_lines_gap_length_ratio": 3.0,
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"default_bus_thickness": 12.0,
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"default_line_thickness": 6.0,
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"default_text_size": 50.0,
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@ -411,6 +492,11 @@
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"intersheets_ref_suffix": "",
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"junction_size_choice": 3,
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"label_size_ratio": 0.375,
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"operating_point_overlay_i_precision": 3,
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"operating_point_overlay_i_range": "~A",
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"operating_point_overlay_v_precision": 3,
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"operating_point_overlay_v_range": "~V",
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"overbar_offset_ratio": 1.23,
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"pin_symbol_size": 25.0,
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"text_offset_ratio": 0.15
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},
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@ -432,14 +518,19 @@
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"page_layout_descr_file": "",
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"plot_directory": "",
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"spice_adjust_passive_values": false,
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"spice_current_sheet_as_root": false,
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"spice_external_command": "spice \"%I\"",
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"spice_model_current_sheet_as_root": true,
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"spice_save_all_currents": false,
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||||
"spice_save_all_dissipations": false,
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"spice_save_all_voltages": false,
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"subpart_first_id": 65,
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"subpart_id_separator": 0
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},
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"sheets": [
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[
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"24530e76-d05f-4501-b152-7c7379698255",
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""
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"Root"
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]
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],
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"text_variables": {}
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6186
pcb/39p-adapter-a/adapter.kicad_sch
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6186
pcb/39p-adapter-a/adapter.kicad_sch
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File diff suppressed because it is too large
Load diff
4849
pcb/39p-adapter-c/adapter.kicad_pcb
Normal file
4849
pcb/39p-adapter-c/adapter.kicad_pcb
Normal file
File diff suppressed because it is too large
Load diff
83
pcb/39p-adapter-c/adapter.kicad_prl
Normal file
83
pcb/39p-adapter-c/adapter.kicad_prl
Normal file
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@ -0,0 +1,83 @@
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{
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"board": {
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"active_layer": 37,
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"active_layer_preset": "",
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"auto_track_width": true,
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"hidden_netclasses": [],
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||||
"hidden_nets": [],
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||||
"high_contrast_mode": 0,
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||||
"net_color_mode": 1,
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||||
"opacity": {
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||||
"images": 0.6,
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||||
"pads": 1.0,
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"tracks": 1.0,
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"vias": 1.0,
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"zones": 0.5099999904632568
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},
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"ratsnest_display_mode": 0,
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"selection_filter": {
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||||
"dimensions": false,
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"footprints": true,
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"graphics": false,
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"keepouts": false,
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"lockedItems": true,
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"otherItems": false,
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"pads": false,
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"text": true,
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"tracks": true,
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"vias": true,
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"zones": false
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},
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"visible_items": [
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0,
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1,
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],
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"visible_layers": "00090a0_80000001",
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"zone_display_mode": 0
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||||
"git": {
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"repo_password": "",
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"repo_username": "",
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"ssh_key": ""
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},
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"meta": {
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"filename": "adapter.kicad_prl",
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"version": 3
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},
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"project": {
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"files": []
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}
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}
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537
pcb/39p-adapter-c/adapter.kicad_pro
Normal file
537
pcb/39p-adapter-c/adapter.kicad_pro
Normal file
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@ -0,0 +1,537 @@
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{
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"board": {
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"3dviewports": [],
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"design_settings": {
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"defaults": {
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"board_outline_line_width": 0.09999999999999999,
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"copper_line_width": 0.19999999999999998,
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"copper_text_italic": false,
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"copper_text_size_h": 1.5,
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"copper_text_size_v": 1.5,
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"copper_text_thickness": 0.3,
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"copper_text_upright": false,
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"courtyard_line_width": 0.049999999999999996,
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"dimension_precision": 4,
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"dimension_units": 3,
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"dimensions": {
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"arrow_length": 1270000,
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"extension_offset": 500000,
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"keep_text_aligned": true,
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"suppress_zeroes": false,
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"text_position": 0,
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"units_format": 1
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||||
},
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||||
"fab_line_width": 0.09999999999999999,
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"fab_text_italic": false,
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"fab_text_size_h": 1.0,
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"fab_text_size_v": 1.0,
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"fab_text_thickness": 0.15,
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"fab_text_upright": false,
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"other_line_width": 0.15,
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"other_text_italic": false,
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||||
"other_text_size_h": 1.0,
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"other_text_size_v": 1.0,
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"other_text_thickness": 0.15,
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"other_text_upright": false,
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"pads": {
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"drill": 0.762,
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"height": 1.524,
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"width": 1.524
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},
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"silk_line_width": 0.15,
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"silk_text_italic": false,
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||||
"silk_text_size_h": 1.0,
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"silk_text_size_v": 1.0,
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||||
"silk_text_thickness": 0.15,
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"silk_text_upright": false,
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"zones": {
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"45_degree_only": false,
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"min_clearance": 0.508
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}
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||||
},
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||||
"diff_pair_dimensions": [
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{
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||||
"gap": 0.0,
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||||
"via_gap": 0.0,
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"width": 0.0
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||||
}
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||||
],
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"drc_exclusions": [],
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"meta": {
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"version": 2
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},
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"rule_severities": {
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"annular_width": "error",
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||||
"clearance": "error",
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||||
"copper_edge_clearance": "error",
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||||
"courtyards_overlap": "error",
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||||
"diff_pair_gap_out_of_range": "error",
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||||
"diff_pair_uncoupled_length_too_long": "error",
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||||
"drill_out_of_range": "error",
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"duplicate_footprints": "warning",
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||||
"extra_footprint": "warning",
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||||
"footprint_type_mismatch": "error",
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||||
"hole_clearance": "error",
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||||
"hole_near_hole": "error",
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||||
"invalid_outline": "error",
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||||
"item_on_disabled_layer": "error",
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||||
"items_not_allowed": "error",
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||||
"length_out_of_range": "error",
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||||
"malformed_courtyard": "error",
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||||
"microvia_drill_out_of_range": "error",
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||||
"missing_courtyard": "ignore",
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||||
"missing_footprint": "warning",
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||||
"net_conflict": "warning",
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||||
"npth_inside_courtyard": "ignore",
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||||
"padstack": "error",
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||||
"pth_inside_courtyard": "ignore",
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||||
"shorting_items": "error",
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||||
"silk_over_copper": "warning",
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||||
"silk_overlap": "warning",
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||||
"skew_out_of_range": "error",
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||||
"through_hole_pad_without_hole": "error",
|
||||
"too_many_vias": "error",
|
||||
"track_dangling": "warning",
|
||||
"track_width": "error",
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||||
"tracks_crossing": "error",
|
||||
"unconnected_items": "error",
|
||||
"unresolved_variable": "error",
|
||||
"via_dangling": "warning",
|
||||
"zone_has_empty_net": "error",
|
||||
"zones_intersect": "error"
|
||||
},
|
||||
"rules": {
|
||||
"allow_blind_buried_vias": false,
|
||||
"allow_microvias": false,
|
||||
"max_error": 0.005,
|
||||
"min_clearance": 0.15239999999999998,
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||||
"min_copper_edge_clearance": 0.075,
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||||
"min_hole_clearance": 0.0,
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||||
"min_hole_to_hole": 0.25,
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||||
"min_microvia_diameter": 0.19999999999999998,
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||||
"min_microvia_drill": 0.09999999999999999,
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||||
"min_silk_clearance": 0.0,
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||||
"min_through_hole_diameter": 0.3,
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||||
"min_track_width": 0.15239999999999998,
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||||
"min_via_annular_width": 0.049999999999999996,
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||||
"min_via_diameter": 0.6095999999999999,
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||||
"solder_mask_clearance": 0.0,
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||||
"solder_mask_min_width": 0.0,
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||||
"use_height_for_length_calcs": true
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||||
},
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||||
"track_widths": [
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||||
0.0,
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||||
0.1524,
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||||
0.2,
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||||
0.3,
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||||
0.4,
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0.6,
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||||
0.8,
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||||
1.0
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||||
],
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||||
"via_dimensions": [
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||||
{
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||||
"diameter": 0.0,
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||||
"drill": 0.0
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||||
},
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||||
{
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||||
"diameter": 0.65,
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||||
"drill": 0.3
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||||
}
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||||
],
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||||
"zones_allow_external_fillets": false,
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||||
"zones_use_no_outline": true
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||||
},
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||||
"ipc2581": {
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||||
"dist": "",
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||||
"distpn": "",
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||||
"internal_id": "",
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||||
"mfg": "",
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||||
"mpn": ""
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||||
},
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||||
"layer_presets": [],
|
||||
"viewports": []
|
||||
},
|
||||
"boards": [],
|
||||
"cvpcb": {
|
||||
"equivalence_files": []
|
||||
},
|
||||
"erc": {
|
||||
"erc_exclusions": [],
|
||||
"meta": {
|
||||
"version": 0
|
||||
},
|
||||
"pin_map": [
|
||||
[
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
2,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
1,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
1,
|
||||
2,
|
||||
1,
|
||||
1,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
0,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
2,
|
||||
1,
|
||||
2,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
2,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
2,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
2,
|
||||
1,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
2,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2
|
||||
]
|
||||
],
|
||||
"rule_severities": {
|
||||
"bus_definition_conflict": "error",
|
||||
"bus_entry_needed": "error",
|
||||
"bus_label_syntax": "error",
|
||||
"bus_to_bus_conflict": "error",
|
||||
"bus_to_net_conflict": "error",
|
||||
"conflicting_netclasses": "error",
|
||||
"different_unit_footprint": "error",
|
||||
"different_unit_net": "error",
|
||||
"duplicate_reference": "error",
|
||||
"duplicate_sheet_names": "error",
|
||||
"endpoint_off_grid": "warning",
|
||||
"extra_units": "error",
|
||||
"global_label_dangling": "warning",
|
||||
"hier_label_mismatch": "error",
|
||||
"label_dangling": "error",
|
||||
"lib_symbol_issues": "warning",
|
||||
"missing_bidi_pin": "warning",
|
||||
"missing_input_pin": "warning",
|
||||
"missing_power_pin": "error",
|
||||
"missing_unit": "warning",
|
||||
"multiple_net_names": "warning",
|
||||
"net_not_bus_member": "warning",
|
||||
"no_connect_connected": "warning",
|
||||
"no_connect_dangling": "warning",
|
||||
"pin_not_connected": "error",
|
||||
"pin_not_driven": "error",
|
||||
"pin_to_pin": "warning",
|
||||
"power_pin_not_driven": "error",
|
||||
"similar_labels": "warning",
|
||||
"simulation_model_issue": "ignore",
|
||||
"unannotated": "error",
|
||||
"unit_value_mismatch": "error",
|
||||
"unresolved_variable": "error",
|
||||
"wire_dangling": "error"
|
||||
}
|
||||
},
|
||||
"libraries": {
|
||||
"pinned_footprint_libs": [],
|
||||
"pinned_symbol_libs": []
|
||||
},
|
||||
"meta": {
|
||||
"filename": "adapter.kicad_pro",
|
||||
"version": 1
|
||||
},
|
||||
"net_settings": {
|
||||
"classes": [
|
||||
{
|
||||
"bus_width": 12,
|
||||
"clearance": 0.1524,
|
||||
"diff_pair_gap": 0.25,
|
||||
"diff_pair_via_gap": 0.25,
|
||||
"diff_pair_width": 0.2,
|
||||
"line_style": 0,
|
||||
"microvia_diameter": 0.3,
|
||||
"microvia_drill": 0.1,
|
||||
"name": "Default",
|
||||
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
||||
"schematic_color": "rgba(0, 0, 0, 0.000)",
|
||||
"track_width": 0.1524,
|
||||
"via_diameter": 0.65,
|
||||
"via_drill": 0.3,
|
||||
"wire_width": 6
|
||||
}
|
||||
],
|
||||
"meta": {
|
||||
"version": 3
|
||||
},
|
||||
"net_colors": null,
|
||||
"netclass_assignments": null,
|
||||
"netclass_patterns": []
|
||||
},
|
||||
"pcbnew": {
|
||||
"last_paths": {
|
||||
"gencad": "",
|
||||
"idf": "",
|
||||
"netlist": "",
|
||||
"plot": "",
|
||||
"pos_files": "",
|
||||
"specctra_dsn": "",
|
||||
"step": "",
|
||||
"svg": "",
|
||||
"vrml": ""
|
||||
},
|
||||
"page_layout_descr_file": ""
|
||||
},
|
||||
"schematic": {
|
||||
"annotate_start_num": 0,
|
||||
"bom_fmt_presets": [],
|
||||
"bom_fmt_settings": {
|
||||
"field_delimiter": ",",
|
||||
"keep_line_breaks": false,
|
||||
"keep_tabs": false,
|
||||
"name": "CSV",
|
||||
"ref_delimiter": ",",
|
||||
"ref_range_delimiter": "",
|
||||
"string_delimiter": "\""
|
||||
},
|
||||
"bom_presets": [],
|
||||
"bom_settings": {
|
||||
"exclude_dnp": false,
|
||||
"fields_ordered": [
|
||||
{
|
||||
"group_by": false,
|
||||
"label": "Reference",
|
||||
"name": "Reference",
|
||||
"show": true
|
||||
},
|
||||
{
|
||||
"group_by": true,
|
||||
"label": "Value",
|
||||
"name": "Value",
|
||||
"show": true
|
||||
},
|
||||
{
|
||||
"group_by": false,
|
||||
"label": "Datasheet",
|
||||
"name": "Datasheet",
|
||||
"show": true
|
||||
},
|
||||
{
|
||||
"group_by": false,
|
||||
"label": "Footprint",
|
||||
"name": "Footprint",
|
||||
"show": true
|
||||
},
|
||||
{
|
||||
"group_by": false,
|
||||
"label": "Qty",
|
||||
"name": "${QUANTITY}",
|
||||
"show": true
|
||||
},
|
||||
{
|
||||
"group_by": true,
|
||||
"label": "DNP",
|
||||
"name": "${DNP}",
|
||||
"show": true
|
||||
}
|
||||
],
|
||||
"filter_string": "",
|
||||
"group_symbols": true,
|
||||
"name": "Grouped By Value",
|
||||
"sort_asc": true,
|
||||
"sort_field": "Reference"
|
||||
},
|
||||
"connection_grid_size": 50.0,
|
||||
"drawing": {
|
||||
"dashed_lines_dash_length_ratio": 12.0,
|
||||
"dashed_lines_gap_length_ratio": 3.0,
|
||||
"default_bus_thickness": 12.0,
|
||||
"default_line_thickness": 6.0,
|
||||
"default_text_size": 50.0,
|
||||
"default_wire_thickness": 6.0,
|
||||
"field_names": [],
|
||||
"intersheets_ref_own_page": false,
|
||||
"intersheets_ref_prefix": "",
|
||||
"intersheets_ref_short": false,
|
||||
"intersheets_ref_show": false,
|
||||
"intersheets_ref_suffix": "",
|
||||
"junction_size_choice": 3,
|
||||
"label_size_ratio": 0.375,
|
||||
"operating_point_overlay_i_precision": 3,
|
||||
"operating_point_overlay_i_range": "~A",
|
||||
"operating_point_overlay_v_precision": 3,
|
||||
"operating_point_overlay_v_range": "~V",
|
||||
"overbar_offset_ratio": 1.23,
|
||||
"pin_symbol_size": 25.0,
|
||||
"text_offset_ratio": 0.15
|
||||
},
|
||||
"legacy_lib_dir": "",
|
||||
"legacy_lib_list": [],
|
||||
"meta": {
|
||||
"version": 1
|
||||
},
|
||||
"net_format_name": "",
|
||||
"ngspice": {
|
||||
"fix_include_paths": true,
|
||||
"fix_passive_vals": false,
|
||||
"meta": {
|
||||
"version": 0
|
||||
},
|
||||
"model_mode": 0,
|
||||
"workbook_filename": ""
|
||||
},
|
||||
"page_layout_descr_file": "",
|
||||
"plot_directory": "",
|
||||
"spice_adjust_passive_values": false,
|
||||
"spice_current_sheet_as_root": false,
|
||||
"spice_external_command": "spice \"%I\"",
|
||||
"spice_model_current_sheet_as_root": true,
|
||||
"spice_save_all_currents": false,
|
||||
"spice_save_all_dissipations": false,
|
||||
"spice_save_all_voltages": false,
|
||||
"subpart_first_id": 65,
|
||||
"subpart_id_separator": 0
|
||||
},
|
||||
"sheets": [
|
||||
[
|
||||
"24530e76-d05f-4501-b152-7c7379698255",
|
||||
"Root"
|
||||
]
|
||||
],
|
||||
"text_variables": {}
|
||||
}
|
||||
6237
pcb/39p-adapter-c/adapter.kicad_sch
Normal file
6237
pcb/39p-adapter-c/adapter.kicad_sch
Normal file
File diff suppressed because it is too large
Load diff
3
pcb/39p-adapter-c/fp-lib-table
Normal file
3
pcb/39p-adapter-c/fp-lib-table
Normal file
|
|
@ -0,0 +1,3 @@
|
|||
(fp_lib_table
|
||||
(lib (name "footprints")(type "KiCad")(uri "${KIPRJMOD}/../common/footprints.pretty")(options "")(descr ""))
|
||||
)
|
||||
File diff suppressed because it is too large
Load diff
File diff suppressed because it is too large
Load diff
|
|
@ -1,162 +0,0 @@
|
|||
37621078134234
|
||||
footprints
|
||||
472720024
|
||||
47272-0024
|
||||
Connector
|
||||
0
|
||||
24
|
||||
21
|
||||
footprints
|
||||
AXE520124
|
||||
|
||||
|
||||
0
|
||||
24
|
||||
21
|
||||
footprints
|
||||
AXE550127
|
||||
|
||||
|
||||
0
|
||||
54
|
||||
51
|
||||
footprints
|
||||
AXT524124
|
||||
|
||||
|
||||
0
|
||||
28
|
||||
25
|
||||
footprints
|
||||
BGA-96_9.0x14.0mm_P0.8mm
|
||||
BGA-96, http://www.mouser.com/ds/2/198/43-46TR16640B-81280BL-706483.pdf
|
||||
BGA-96
|
||||
0
|
||||
96
|
||||
96
|
||||
footprints
|
||||
HRS_FH26W-39S-0.3SHW(60)
|
||||
|
||||
|
||||
0
|
||||
41
|
||||
41
|
||||
footprints
|
||||
Hirose_FH12-40S-0.5SH_1x40-1MP_P0.50mm_Horizontal_Reversed
|
||||
Hirose FH12, FFC/FPC connector, FH12-40S-0.5SH, 40 Pins per row (https://www.hirose.com/product/en/products/FH12/FH12-24S-0.5SH(55)/), generated with kicad-footprint-generator
|
||||
connector Hirose FH12 horizontal
|
||||
0
|
||||
42
|
||||
41
|
||||
footprints
|
||||
L_1212
|
||||
Inductor, 3.0mmx3.0mm
|
||||
inductor vishay ihlp smd
|
||||
0
|
||||
2
|
||||
2
|
||||
footprints
|
||||
L_CommonModeChoke_Panasonic_EXC14CE
|
||||
Coilcraft 0603USB Series Common Mode Choke, https://www.coilcraft.com/pdfs/0603usb.pdf
|
||||
surface mount common mode bead
|
||||
0
|
||||
4
|
||||
4
|
||||
footprints
|
||||
L_FXL0420
|
||||
|
||||
|
||||
0
|
||||
2
|
||||
2
|
||||
footprints
|
||||
L_MAPM0630F
|
||||
|
||||
|
||||
0
|
||||
2
|
||||
2
|
||||
footprints
|
||||
L_MAPM1040F
|
||||
|
||||
|
||||
0
|
||||
2
|
||||
2
|
||||
footprints
|
||||
MPS_QFN-16_3x3mm_P0.4mm
|
||||
QFN, 16 Pin (https://www.onsemi.com/pub/Collateral/NCN4555-D.PDF), generated with kicad-footprint-generator ipc_noLead_generator.py
|
||||
QFN NoLead
|
||||
0
|
||||
16
|
||||
16
|
||||
footprints
|
||||
MSOP-10-1EP_3x3mm_P0.5mm_EP1.68x1.88mm_ThermalVias_0.3
|
||||
MSOP, 10 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/3805fg.pdf#page=18), generated with kicad-footprint-generator ipc_gullwing_generator.py
|
||||
MSOP SO
|
||||
0
|
||||
20
|
||||
11
|
||||
footprints
|
||||
Molex_200528-0060_1x06-1MP_P1.00mm_Horizontal_Reversed
|
||||
Molex Molex 1.00mm Pitch Easy-On BackFlip, Right-Angle, Bottom Contact FFC/FPC, 200528-0060, 6 Circuits (https://www.molex.com/pdm_docs/sd/2005280060_sd.pdf), generated with kicad-footprint-generator
|
||||
connector Molex top entry
|
||||
0
|
||||
8
|
||||
7
|
||||
footprints
|
||||
QFN-28-1EP_4x5mm_P0.5mm_EP2.65x3.65mm_ThermalVias_0.3
|
||||
QFN, 28 Pin (http://www.analog.com/media/en/technical-documentation/data-sheets/3555fe.pdf#page=32), generated with kicad-footprint-generator ipc_noLead_generator.py
|
||||
QFN NoLead
|
||||
0
|
||||
48
|
||||
29
|
||||
footprints
|
||||
QFN-48-1EP_7x7mm_P0.5mm_EP4.1x4.1mm_ThermalVias
|
||||
QFN, 48 Pin (http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/QFN_48_05-08-1704.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py
|
||||
QFN NoLead
|
||||
0
|
||||
71
|
||||
49
|
||||
footprints
|
||||
RP2040-QFN-56
|
||||
QFN, 56 Pin (http://www.cypress.com/file/416486/download#page=40), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py
|
||||
QFN DFN_QFN
|
||||
0
|
||||
70
|
||||
57
|
||||
footprints
|
||||
TE_5-2069716-3_1x40-1MP_P0.5mm_Horizontal
|
||||
TE FPC connector, 40 top-side contacts, 0.5mm pitch, SMT, https://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F1734839%7FC%7Fpdf%7FEnglish%7FENG_CD_1734839_C_C_1734839.pdf%7F4-1734839-0
|
||||
te fpc 1734839
|
||||
0
|
||||
44
|
||||
41
|
||||
footprints
|
||||
TE_1612503-1
|
||||
|
||||
|
||||
0
|
||||
7
|
||||
6
|
||||
footprints
|
||||
TE_1735413-1
|
||||
SATA, Receptacle, Cable-to-Board, 13 Position, 6P + 7P, Slimline Connector Profile, Right Angle, Surface Mount
|
||||
|
||||
0
|
||||
15
|
||||
14
|
||||
footprints
|
||||
TE_2023246-2
|
||||
SATA, Receptacle, Cable-to-Board, 22 Position, 7P + 15P, Standard Connector Profile, Right Angle, Surface Mount
|
||||
|
||||
0
|
||||
24
|
||||
23
|
||||
footprints
|
||||
Xilinx_FTG256
|
||||
Artix-7 BGA, 16x16 grid, 17x17mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=269, NSMD pad definition Appendix A
|
||||
BGA 256 1 FT256 FTG256
|
||||
0
|
||||
256
|
||||
256
|
||||
Loading…
Reference in a new issue