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r0p7 layout done
This commit is contained in:
Wenting Zhang
parent
19e07df396
commit
8ccf2bdbff
14 changed files with 155851 additions and 21155 deletions
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@ -32,3 +32,4 @@ Lite R0.1
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R0.7
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1. Import DVI TMDS input, newly revised power supply and user button from RL0.1
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2. Connect FPGA to RP2040's hardware SPI
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3. Fix USB Type C mux connection
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||||
(size 1.27 1.27)
|
||||
)
|
||||
)
|
||||
)
|
||||
(property "Footprint" ""
|
||||
(at 129.54 127 0)
|
||||
(effects
|
||||
(font
|
||||
(size 1.27 1.27)
|
||||
)
|
||||
(hide yes)
|
||||
)
|
||||
)
|
||||
(property "Datasheet" ""
|
||||
(at 129.54 127 0)
|
||||
(effects
|
||||
(font
|
||||
(size 1.27 1.27)
|
||||
)
|
||||
(hide yes)
|
||||
)
|
||||
)
|
||||
(property "Description" ""
|
||||
(at 129.54 127 0)
|
||||
(effects
|
||||
(font
|
||||
(size 1.27 1.27)
|
||||
)
|
||||
(hide yes)
|
||||
)
|
||||
)
|
||||
(pin "1"
|
||||
(uuid "c086f260-99a8-458a-93ea-505c5754cb4b")
|
||||
)
|
||||
(instances
|
||||
(project "pcb"
|
||||
(path "/4654897e-3e2f-4522-96c3-20b19803c088/b1d5941d-0481-47a2-a434-0b8e587a166a"
|
||||
(reference "#PWR074")
|
||||
(unit 1)
|
||||
)
|
||||
)
|
||||
)
|
||||
)
|
||||
(symbol
|
||||
(lib_id "Device:C")
|
||||
(at 251.46 143.51 0)
|
||||
|
|
@ -15932,6 +15746,72 @@
|
|||
)
|
||||
)
|
||||
)
|
||||
(symbol
|
||||
(lib_id "symbols:+5V_EPD")
|
||||
(at 129.54 127 0)
|
||||
(unit 1)
|
||||
(exclude_from_sim no)
|
||||
(in_bom yes)
|
||||
(on_board yes)
|
||||
(dnp no)
|
||||
(fields_autoplaced yes)
|
||||
(uuid "beb8a185-3568-448f-a6c9-7939dedfe71d")
|
||||
(property "Reference" "#PWR048"
|
||||
(at 129.54 130.81 0)
|
||||
(effects
|
||||
(font
|
||||
(size 1.27 1.27)
|
||||
)
|
||||
(hide yes)
|
||||
)
|
||||
)
|
||||
(property "Value" "+5V_EPD"
|
||||
(at 129.54 121.92 0)
|
||||
(effects
|
||||
(font
|
||||
(size 1.27 1.27)
|
||||
)
|
||||
)
|
||||
)
|
||||
(property "Footprint" ""
|
||||
(at 129.54 127 0)
|
||||
(effects
|
||||
(font
|
||||
(size 1.27 1.27)
|
||||
)
|
||||
(hide yes)
|
||||
)
|
||||
)
|
||||
(property "Datasheet" ""
|
||||
(at 129.54 127 0)
|
||||
(effects
|
||||
(font
|
||||
(size 1.27 1.27)
|
||||
)
|
||||
(hide yes)
|
||||
)
|
||||
)
|
||||
(property "Description" ""
|
||||
(at 129.54 127 0)
|
||||
(effects
|
||||
(font
|
||||
(size 1.27 1.27)
|
||||
)
|
||||
(hide yes)
|
||||
)
|
||||
)
|
||||
(pin "1"
|
||||
(uuid "4474e04c-0759-4eee-ada3-1c418db7f165")
|
||||
)
|
||||
(instances
|
||||
(project "pcb"
|
||||
(path "/4654897e-3e2f-4522-96c3-20b19803c088/b1d5941d-0481-47a2-a434-0b8e587a166a"
|
||||
(reference "#PWR048")
|
||||
(unit 1)
|
||||
)
|
||||
)
|
||||
)
|
||||
)
|
||||
(symbol
|
||||
(lib_id "power:GND")
|
||||
(at 137.16 104.14 0)
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load diff
File diff suppressed because it is too large
Load diff
File diff suppressed because it is too large
Load diff
File diff suppressed because it is too large
Load diff
File diff suppressed because it is too large
Load diff
|
|
@ -6,7 +6,7 @@
|
|||
"hidden_netclasses": [],
|
||||
"hidden_nets": [],
|
||||
"high_contrast_mode": 0,
|
||||
"net_color_mode": 1,
|
||||
"net_color_mode": 2,
|
||||
"opacity": {
|
||||
"images": 0.6,
|
||||
"pads": 1.0,
|
||||
|
|
@ -18,15 +18,15 @@
|
|||
"selection_filter": {
|
||||
"dimensions": false,
|
||||
"footprints": true,
|
||||
"graphics": true,
|
||||
"keepouts": true,
|
||||
"graphics": false,
|
||||
"keepouts": false,
|
||||
"lockedItems": true,
|
||||
"otherItems": false,
|
||||
"pads": true,
|
||||
"text": false,
|
||||
"pads": false,
|
||||
"text": true,
|
||||
"tracks": true,
|
||||
"vias": true,
|
||||
"zones": true
|
||||
"zones": false
|
||||
},
|
||||
"visible_items": [
|
||||
0,
|
||||
|
|
@ -64,7 +64,7 @@
|
|||
35,
|
||||
36
|
||||
],
|
||||
"visible_layers": "000d0e0_80000007",
|
||||
"visible_layers": "ff8ffff_fffffff9",
|
||||
"zone_display_mode": 0
|
||||
},
|
||||
"git": {
|
||||
|
|
|
|||
|
|
@ -49,7 +49,7 @@
|
|||
"silk_text_upright": false,
|
||||
"zones": {
|
||||
"45_degree_only": false,
|
||||
"min_clearance": 0.15
|
||||
"min_clearance": 0.11
|
||||
}
|
||||
},
|
||||
"diff_pair_dimensions": [
|
||||
|
|
@ -229,8 +229,12 @@
|
|||
"drill": 0.0
|
||||
},
|
||||
{
|
||||
"diameter": 0.46,
|
||||
"drill": 0.2
|
||||
"diameter": 0.45,
|
||||
"drill": 0.3
|
||||
},
|
||||
{
|
||||
"diameter": 0.8,
|
||||
"drill": 0.35
|
||||
}
|
||||
],
|
||||
"zones_allow_external_fillets": false,
|
||||
|
|
@ -493,14 +497,14 @@
|
|||
"clearance": 0.11,
|
||||
"diff_pair_gap": 0.11,
|
||||
"diff_pair_via_gap": 0.25,
|
||||
"diff_pair_width": 0.15,
|
||||
"diff_pair_width": 0.127,
|
||||
"line_style": 0,
|
||||
"microvia_diameter": 0.3,
|
||||
"microvia_drill": 0.1,
|
||||
"name": "DP",
|
||||
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
||||
"schematic_color": "rgba(0, 0, 0, 0.000)",
|
||||
"track_width": 0.15,
|
||||
"track_width": 0.11,
|
||||
"via_diameter": 0.45,
|
||||
"via_drill": 0.3,
|
||||
"wire_width": 6
|
||||
|
|
@ -515,7 +519,7 @@
|
|||
"microvia_diameter": 0.3,
|
||||
"microvia_drill": 0.1,
|
||||
"name": "EPD",
|
||||
"pcb_color": "rgb(255, 0, 191)",
|
||||
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
||||
"schematic_color": "rgba(0, 0, 0, 0.000)",
|
||||
"track_width": 0.11,
|
||||
"via_diameter": 0.45,
|
||||
|
|
@ -527,14 +531,31 @@
|
|||
"clearance": 0.11,
|
||||
"diff_pair_gap": 0.11,
|
||||
"diff_pair_via_gap": 0.25,
|
||||
"diff_pair_width": 0.15,
|
||||
"diff_pair_width": 0.127,
|
||||
"line_style": 0,
|
||||
"microvia_diameter": 0.3,
|
||||
"microvia_drill": 0.1,
|
||||
"name": "LVDS",
|
||||
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
||||
"schematic_color": "rgba(0, 0, 0, 0.000)",
|
||||
"track_width": 0.15,
|
||||
"track_width": 0.11,
|
||||
"via_diameter": 0.45,
|
||||
"via_drill": 0.3,
|
||||
"wire_width": 6
|
||||
},
|
||||
{
|
||||
"bus_width": 12,
|
||||
"clearance": 0.11,
|
||||
"diff_pair_gap": 0.1,
|
||||
"diff_pair_via_gap": 0.25,
|
||||
"diff_pair_width": 0.2,
|
||||
"line_style": 0,
|
||||
"microvia_diameter": 0.3,
|
||||
"microvia_drill": 0.1,
|
||||
"name": "POWER",
|
||||
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
||||
"schematic_color": "rgba(0, 0, 0, 0.000)",
|
||||
"track_width": 0.25,
|
||||
"via_diameter": 0.45,
|
||||
"via_drill": 0.3,
|
||||
"wire_width": 6
|
||||
|
|
@ -549,7 +570,7 @@
|
|||
"microvia_diameter": 0.3,
|
||||
"microvia_drill": 0.1,
|
||||
"name": "SDRAM_A",
|
||||
"pcb_color": "rgb(103, 255, 0)",
|
||||
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
||||
"schematic_color": "rgba(0, 0, 0, 0.000)",
|
||||
"track_width": 0.127,
|
||||
"via_diameter": 0.45,
|
||||
|
|
@ -566,7 +587,7 @@
|
|||
"microvia_diameter": 0.3,
|
||||
"microvia_drill": 0.1,
|
||||
"name": "SDRAM_H",
|
||||
"pcb_color": "rgb(255, 252, 0)",
|
||||
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
||||
"schematic_color": "rgba(0, 0, 0, 0.000)",
|
||||
"track_width": 0.127,
|
||||
"via_diameter": 0.45,
|
||||
|
|
@ -583,7 +604,7 @@
|
|||
"microvia_diameter": 0.3,
|
||||
"microvia_drill": 0.1,
|
||||
"name": "SDRAM_L",
|
||||
"pcb_color": "rgb(255, 131, 3)",
|
||||
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
||||
"schematic_color": "rgba(0, 0, 0, 0.000)",
|
||||
"track_width": 0.127,
|
||||
"via_diameter": 0.45,
|
||||
|
|
@ -595,14 +616,14 @@
|
|||
"clearance": 0.11,
|
||||
"diff_pair_gap": 0.11,
|
||||
"diff_pair_via_gap": 0.25,
|
||||
"diff_pair_width": 0.18,
|
||||
"diff_pair_width": 0.15,
|
||||
"line_style": 0,
|
||||
"microvia_diameter": 0.3,
|
||||
"microvia_drill": 0.1,
|
||||
"name": "USB",
|
||||
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
||||
"schematic_color": "rgba(0, 0, 0, 0.000)",
|
||||
"track_width": 0.15,
|
||||
"track_width": 0.11,
|
||||
"via_diameter": 0.45,
|
||||
"via_drill": 0.3,
|
||||
"wire_width": 6
|
||||
|
|
@ -613,9 +634,11 @@
|
|||
},
|
||||
"net_colors": {
|
||||
"+1V0": "rgb(255, 92, 56)",
|
||||
"+1V2": "rgb(255, 117, 0)",
|
||||
"+1V35": "rgb(185, 61, 143)",
|
||||
"+3V3": "rgb(179, 228, 50)",
|
||||
"+5V": "rgb(255, 122, 107)",
|
||||
"+5V_EPD": "rgb(255, 37, 28)",
|
||||
"GND": "rgb(0, 94, 255)"
|
||||
},
|
||||
"netclass_assignments": null,
|
||||
|
|
@ -638,7 +661,7 @@
|
|||
},
|
||||
{
|
||||
"netclass": "LVDS",
|
||||
"pattern": "TMDS*"
|
||||
"pattern": "LVDS*"
|
||||
},
|
||||
{
|
||||
"netclass": "SDRAM_L",
|
||||
|
|
@ -659,6 +682,30 @@
|
|||
{
|
||||
"netclass": "SDRAM_H",
|
||||
"pattern": "/fpga_ddr/DRAM_U*"
|
||||
},
|
||||
{
|
||||
"netclass": "DP",
|
||||
"pattern": "/dp_in/*"
|
||||
},
|
||||
{
|
||||
"netclass": "LVDS",
|
||||
"pattern": "*TMDS*"
|
||||
},
|
||||
{
|
||||
"netclass": "POWER",
|
||||
"pattern": "+*"
|
||||
},
|
||||
{
|
||||
"netclass": "POWER",
|
||||
"pattern": "GND"
|
||||
},
|
||||
{
|
||||
"netclass": "POWER",
|
||||
"pattern": "V*"
|
||||
},
|
||||
{
|
||||
"netclass": "USB",
|
||||
"pattern": "USB*"
|
||||
}
|
||||
]
|
||||
},
|
||||
|
|
@ -667,7 +714,7 @@
|
|||
"gencad": "",
|
||||
"idf": "",
|
||||
"netlist": "",
|
||||
"plot": "",
|
||||
"plot": "gerber/",
|
||||
"pos_files": "",
|
||||
"specctra_dsn": "",
|
||||
"step": "pcb.step",
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load diff
File diff suppressed because it is too large
Load diff
Loading…
Reference in a new issue