39 lines
1 KiB
Diff
39 lines
1 KiB
Diff
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Patch-Source: https://lists.openembedded.org/g/openembedded-core/message/161168
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partially extracted to actually apply onto a release tarball
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---
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From dfb22e4d6662bf72879eda806eaa78c7b52b519e Mon Sep 17 00:00:00 2001
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From: Khem Raj <raj.khem@gmail.com>
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Date: Tue, 25 Jan 2022 20:29:14 -0800
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Subject: [PATCH] vm_dump.c: Define REG_S1 and REG_S2 for musl/riscv
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These defines are missing in musl, there is a possible
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patch to add them to musl, but we need a full list of
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these names for mcontext that can be added once for all
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Upstream-Status: Inappropriate [musl bug]
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Signed-off-by: Khem Raj <raj.khem@gmail.com>
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---
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vm_dump.c | 5 +++++
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1 file changed, 5 insertions(+)
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diff --git a/vm_dump.c b/vm_dump.c
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index a98f5aa..957b785 100644
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--- a/vm_dump.c
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+++ b/vm_dump.c
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@@ -39,6 +39,11 @@
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#define MAX_POSBUF 128
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+#if defined(__riscv) && !defined(__GLIBC__)
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+# define REG_S1 9
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+# define REG_S2 18
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+#endif
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+
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#define VM_CFP_CNT(ec, cfp) \
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((rb_control_frame_t *)((ec)->vm_stack + (ec)->vm_stack_size) - \
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(rb_control_frame_t *)(cfp))
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--
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2.35.0
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